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patch applied to sh.md


This patch is necessary to get sh64-elf to build. From the nature of the change, I would class it as an
obvious change, except that there have been large changes in the rest of the compiler that could
have made the sh-elf configuration depend on the bogus pattern, so I did a regression test for sh-elf
-m1 / -m4 -ml . About three dozen regressions were fixed in the gcc testsuite alone.
The sh64-elf build failed with an ICE in gen_rtx_SUBREG while compiling muldi3.
The problem was that extract_bit_field uses mode_for_extraction to
set max_mode.  mode_for_extraction saw the extv pattern, which is only suitable
for SH4A, but did not say so in the predicate.  As a result,
mode_for_extraction was set to SImode, and in a big endian targeted
compilation, gen_rtx_SUBREG (SImode, (reg:DI ..), 0) was called, which
fails because word_mode is DImode, so an SImode subreg is only allowed
if it is a lowpart, i.e. with offset 4 for big endian.

2004-12-02  J"orn Rennecke <joern.rennecke@st.com>

	* sh.md (extv, extzv): Add pattern predicate.

Index: config/sh/sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.187
diff -p -F^( -r1.187 sh.md
*** config/sh/sh.md	8 Oct 2004 11:44:20 -0000	1.187
--- config/sh/sh.md	1 Dec 2004 16:57:23 -0000
*************** (define_expand "extv"
*** 9447,9453 ****
  	(sign_extract:SI (match_operand:QI 1 "unaligned_load_operand" "")
  			 (match_operand 2 "const_int_operand" "")
  			 (match_operand 3 "const_int_operand" "")))]
!   ""
  {
    if (TARGET_SH4A_ARCH
        && INTVAL (operands[2]) == 32
--- 9447,9453 ----
  	(sign_extract:SI (match_operand:QI 1 "unaligned_load_operand" "")
  			 (match_operand 2 "const_int_operand" "")
  			 (match_operand 3 "const_int_operand" "")))]
!   "TARGET_SH4A_ARCH"
  {
    if (TARGET_SH4A_ARCH
        && INTVAL (operands[2]) == 32
*************** (define_expand "extzv"
*** 9467,9473 ****
  	(zero_extract:SI (match_operand:QI 1 "unaligned_load_operand" "")
  			 (match_operand 2 "const_int_operand" "")
  			 (match_operand 3 "const_int_operand" "")))]
!   ""
  {
    if (TARGET_SH4A_ARCH
        && INTVAL (operands[2]) == 32
--- 9467,9473 ----
  	(zero_extract:SI (match_operand:QI 1 "unaligned_load_operand" "")
  			 (match_operand 2 "const_int_operand" "")
  			 (match_operand 3 "const_int_operand" "")))]
!   "TARGET_SH4A_ARCH"
  {
    if (TARGET_SH4A_ARCH
        && INTVAL (operands[2]) == 32

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