Re: [PATCH] Fix PR 18503

[Uros Bizjak <uros at kss-loka dot si>]

Richard Guenther wrote:

> > Index: i386.md
> > ===================================================================
> > RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
> > retrieving revision 1.562
> > diff -u -p -r1.562 i386.md
> > --- i386.md     18 Oct 2004 13:01:31 -0000      1.562
> > +++ i386.md     17 Nov 2004 09:37:27 -0000
> > @@ -20817,7 +20817,7 @@
> >        (vec_merge:V4SF
> >         (match_operand:V4SF 1 "register_operand" "0")
> >         (match_operand:V4SF 2 "register_operand" "x")
> > -        (const_int 1)))]
> > +        (const_int 14)))]
> >    
>                           ^^^^
> Typo?  From the context I'd have guessed 4 here.
>  
No,  14 (fourteen). This is 1110b, which means "copy values at position 
3,2,1 from vector 1 and value 0 from vector 2. This is indeed what movss 
does:

__m128 _mm_move_ss(__m128 a, __m128 b)

Sets the low word to the SP FP value of b. The upper 3 SP FP values are 
passed through from a.
r0 := b0
r1 := a1
r2 := a2
r3 := a3

> >   "TARGET_SSE"
> >   "movss\t{%2, %0|%0, %2}"
> >   [(set_attr "type" "ssemov")
> > @@ -24279,7 +24279,7 @@
> >        (vec_merge:V2DF
> >         (match_operand:V2DF 1 "nonimmediate_operand" "0,0,0")
> >         (match_operand:V2DF 2 "nonimmediate_operand" "x,m,x")
> > -        (const_int 1)))]
> > +        (const_int 2)))]
> >   "TARGET_SSE2 && ix86_binary_operator_ok (UNKNOWN, V2DFmode, operands)"
> >   "@movsd\t{%2, %0|%0, %2}
> >     movlpd\t{%2, %0|%0, %2}
> >    
Now the fun part with movsd: a (double) testcase in my previous mail 
fails without optimization (gcc -msse2 ...). For doubles, the 
unoptimized code produced is wrong. However, optimized case produces 
right results, as movsd pattern is fixed by my patch.

This is what gcc claims is _mm_move_sd instruction:

_mm_move_sd:
   pushl    %ebp
   movl    %esp, %ebp
   subl    $40, %esp
   movapd    %xmm0, -24(%ebp)
   movapd    %xmm1, -40(%ebp)
   movapd    -24(%ebp), %xmm0
   movhpd    -40(%ebp), %xmm0
   leave
   ret

I guess this shuffling is not what movsd insn really does:

__m128d _mm_move_sd( __m128d a, __m128d b)

(uses MOVSD) Sets the lower DP FP value to the lower DP FP value of b. 
The upper DP FP value is passed through from a.
r0 := b0
r1 := a1

Uros.