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[PATCH/RFA] PR target/18477: SH: spill failure caused with tls


Hi,

There are some R0 spill failures in building nptl'ed glibc with
mainline compiler for sh4-unknown-linux-gnu.  PR target/18477
is a reduced case of one of them.  The problematic part of .sched
dump corresponding with a typcal failure looks like:

--
;;   ======================================================
;;   -- basic block 3 from 32 to 241 -- before reload
;;   ======================================================

;;	  0--> 33   r12=const(unspec[`*_GLOBAL_OFFSET_T:(issue+load_store),nothing,memory
;;	  0--> 32   r0=unspec[const(unspec[`*_GLOBAL_OF:issue,int
;;	  1--> 40   {r160=0.0;use ;clobber scratch;}   :(issue+load_store),nothing,memory
;;	  1--> 38   r172=0x21                          :issue
;;	  2--> 34   r12=r12+r0                         :issue,int
--

Then the spill error is caused by this swap because the insn 40
{r160=0.0;use ;clobber scratch;} will need R0 in reloading pass.
The insns 32-34 emitted with GOTaddr2picreg expand when the
TLS_MODEL_INITIAL_EXEC tls sequence is generated in non-PIC.
The appended patch is to prevent the above swap.  Bootstrapped and
regtested on sh4-unknown-linux-gnu.

Regards,
	kaz
--
2004-11-16  Kaz Kojima  <kkojima@gcc.gnu.org>

	PR target/18477
	* config/sh/sh.c (prepare_move_operands): Emit blockage insns
	before and after the insns for getting GOT address in non-PIC
	TLS_MODEL_INITIAL_EXEC tls sequence when the first scheduling
	is enabled.

diff -uprN ORIG/gcc/gcc/config/sh/sh.c LOCAL/gcc/gcc/config/sh/sh.c
--- ORIG/gcc/gcc/config/sh/sh.c	Sat Nov  6 22:42:19 2004
+++ LOCAL/gcc/gcc/config/sh/sh.c	Fri Nov 12 16:43:07 2004
@@ -1042,9 +1042,16 @@ prepare_move_operands (rtx operands[], e
 	    case TLS_MODEL_INITIAL_EXEC:
 	      if (! flag_pic)
 		{
+		  /* Don't schedule insns for getting GOT address when
+		     the first scheduling is enabled, to avoid spill
+		     failures for R0.  */
+		  if (flag_schedule_insns)
+		    emit_insn (gen_blockage ());
 		  emit_insn (gen_GOTaddr2picreg ());
 		  emit_insn (gen_rtx_USE (VOIDmode, gen_rtx_REG (SImode,
 								 PIC_REG)));
+		  if (flag_schedule_insns)
+		    emit_insn (gen_blockage ());
 		}
 	      tga_op1 = no_new_pseudos ? op0 : gen_reg_rtx (Pmode);
 	      tmp = gen_sym2GOTTPOFF (op1);


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