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Re: [patch] SPARC VIS instructions or PR1820
Eric Botcazou <ebotcazou@libertysurf.fr> writes:
> > Cool, thanks. As for the rest of the patch, I found a problem in the
> > 64bit and description, and have fixed up a bunch of testcases for sparc64,
> > so I'll post an updated patch after I resolve any conflicts I find.
>
> I've applied the remaining bits, i.e the logical vector operations, as well as
> the corresponding testcases. I made a few changes:
> - no new anddi3_sp32_vis and iordi3_sp32_vis patterns, the macroized ones work
> for me. What prompted you to add them?
I was having trouble with fand I think. anddi_sp32_vis was being matched, but
somehow the first set of contraints was matched, not the second, so the
template to use was '#' which was causing trouble.
> - the {AND,IOR,XOR} big splitter needs to be macroized too, because the sp32
> patterns piggyback on it for integer registers,
Is this only needed to use the cheapest set of instructions?
> - about the "??? SImode -> V32I:MODE ?" note you added: it's unnecessary, the
> middle-end knows how to extract SImode subregs out of V64I integer regs in
> 32-bit mode,
I didn't know that, thanks.
> - all macroized patterns have a unique (macroized) name,
> - the combiner was refusing to synthetize the NAND pattern because of its cost
> (12 vs 8) so I've reduced its cost to 4.
I was wondering why combine said fnand cost twelve. Thanks.
> - I tweaked a bit the testcases and removed all the XFAILs.
>
>
> I think future work on VIS support could comprise:
> - support for <const_vector>(-1) via 'fones',
> - vector comparison operations,
> - vector multiply operations,
> - VIS intrinsics.
>
That looks like what I was planning. I'll probably end up working on them
in a different order though. I'd like to get intrinsics working first I think.
>
> 2004-11-13 James A. Morrison <phython@gcc.gnu.org>
> Eric Botcazou <ebotcazou@libertysurf.fr>
>
> PR target/18230
> * config/sparc/sparc.c (sparc_rtx_costs): Handle the NAND vector
> patterns.
> * config/sparc/sparc.md (V64I): New macro for 64-bit modes.
> (V32I): New macro for 32-bit modes.
> (anddi3, anddi_sp32, anddi_sp64, and_not_di_sp32, and_not_di_sp64,
> iordi3, iordi3_sp32, iordi_sp64, or_not_di_sp32, or_not_di_sp64,
> xordi3, xordi3_sp32, xordi3_sp64, {AND, IOR, XOR} DI splitter,
> xor_not_di_sp32, xordi_not_di_sp64, one_cmpldi2, one_cmpldi_sp32,
> one_cmpldi_sp64): Use V64I instead of DI.
> (andsi3, andsi_sp32, andsi_sp64, and_not_si, iorsi3, or_not_si,
> xorsi3, xor_not_si, one_cmplsi2): Use V32I instead of SI.
> (addv2si3, addv4hi3, addv2hi3): Remove % modifier.
> (nandv64i_vis, nandv32i_vis): New patterns.
>
>
> --
> Eric Botcazou
>
--
Thanks,
Jim
http://www.student.cs.uwaterloo.ca/~ja2morri/
http://phython.blogspot.com
http://open.nit.ca/wiki/?page=jim