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[PATCH] s390 fpr alignment fix
- From: Andreas Krebbel <krebbel1 at de dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Tue, 14 Sep 2004 08:45:42 +0200
- Subject: [PATCH] s390 fpr alignment fix
- Organization: IBM Entwicklung GmbH
Hello,
when using the recently introduced -mkernel-backchain option the area for floating point
registers on stack is possibly not properly aligned. Under 31 bit access to a fpr (64 bit) which
is not 8 byte aligned causes a performance penalty.
With the patch s390_frame_info takes this into account when calculating the stack area offsets.
Bootstrapped and regression tested on s390 and s390x
OK?
Bye,
-Andreas-
2004-09-14 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.c (s390_frame_info): Added alignment statement for
floating point register area on stack.
Index: config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.173
diff -p -c -r1.173 s390.c
*** config/s390/s390.c 25 Aug 2004 09:52:23 -0000 1.173
--- config/s390/s390.c 10 Sep 2004 15:02:13 -0000
*************** s390_frame_info (int base_used, int retu
*** 5958,5965 ****
}
else
{
cfun_frame_layout.f0_offset
! = (cfun_frame_layout.gprs_offset
- 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
cfun_frame_layout.f4_offset
--- 5958,5968 ----
}
else
{
+ /* On 31 bit we have to care about alignment of the
+ floating point regs to provide fastest access. */
cfun_frame_layout.f0_offset
! = ((cfun_frame_layout.gprs_offset
! & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1))
- 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
cfun_frame_layout.f4_offset
*************** s390_frame_info (int base_used, int retu
*** 5996,6002 ****
{
cfun_frame_layout.frame_size += (cfun_frame_layout.save_backchain_p
* UNITS_PER_WORD);
!
cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset,
cfun_frame_layout.f4_offset),
cfun_frame_layout.gprs_offset)
--- 5999,6007 ----
{
cfun_frame_layout.frame_size += (cfun_frame_layout.save_backchain_p
* UNITS_PER_WORD);
!
! /* No alignment trouble here because f8-f15 are only saved under
! 64 bit. */
cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset,
cfun_frame_layout.f4_offset),
cfun_frame_layout.gprs_offset)
*************** s390_frame_info (int base_used, int retu
*** 6009,6014 ****
--- 6014,6022 ----
cfun_frame_layout.frame_size += 8;
cfun_frame_layout.frame_size += cfun_gprs_save_area_size;
+
+ /* If under 31 bit an odd number of gprs has to be saved we have to adjust
+ the frame size to sustain 8 byte alignment of stack frames. */
cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size +
STACK_BOUNDARY / BITS_PER_UNIT - 1)
& ~(STACK_BOUNDARY / BITS_PER_UNIT - 1));
*************** s390_gimplify_va_arg (tree valist, tree
*** 7148,7153 ****
--- 7156,7165 ----
indirect_p = 1;
reg = gpr;
n_reg = 1;
+
+ /* TARGET_KERNEL_BACKCHAIN on 31 bit: It is assumed here that no padding
+ will be added by s390_frame_info because for va_args always an even
+ number of gprs has to be saved r15-r2 = 14 regs. */
sav_ofs = (TARGET_KERNEL_BACKCHAIN
? (TARGET_64BIT ? 4 : 2) * 8 : 2 * UNITS_PER_WORD);
sav_scale = UNITS_PER_WORD;
*************** s390_gimplify_va_arg (tree valist, tree
*** 7183,7188 ****
--- 7195,7204 ----
indirect_p = 0;
reg = gpr;
n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+
+ /* TARGET_KERNEL_BACKCHAIN on 31 bit: It is assumed here that no padding
+ will be added by s390_frame_info because for va_args always an even
+ number of gprs has to be saved r15-r2 = 14 regs. */
sav_ofs = TARGET_KERNEL_BACKCHAIN ?
(TARGET_64BIT ? 4 : 2) * 8 : 2*UNITS_PER_WORD;