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[PATCH ARM] Recognize canonical CPU names
- From: Richard Earnshaw <rearnsha at gcc dot gnu dot org>
- To: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 01 Sep 2004 13:51:16 +0100
- Subject: [PATCH ARM] Recognize canonical CPU names
- Organization: GNU
This patch changes the way that we handle CPU names on the ARM so that
we can match names that aren't strict Cnames, such as arm1156jf-s: the
previous code matched arm1156jfs, but such a part doesn't really exist.
Tested on arm-elf with various --with-cpu configure options and for
various -mcpu=... compile-time options.
2004-09-01 Richard Earnshaw <rearnsha@arm.com>
* arm/arm-cores.def (ARM_CORE): Add new field for the real name of the
CPU.
(arm7tdmi-s): New CPU name.
* arm/arm.c (ARM_CORE): Update for new format.
* arm/arm.h (ARM_CORE): Likewise.
* arm/gentune.sh: Update for extra field.
* config.gcc: Likewise.
* arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Document the real processor names for ARM cpus.
Index: config.gcc
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config.gcc,v
retrieving revision 1.483
diff -p -r1.483 config.gcc
*** config.gcc 1 Sep 2004 06:08:34 -0000 1.483
--- config.gcc 1 Sep 2004 12:36:05 -0000
*************** fi
*** 2266,2275 ****
# See if it matches any of the entries in arm-cores.def
eval "val=\$with_$which"
if [ x"$val" = x ] \
! || grep "^ARM_CORE($val," \
${srcdir}/config/arm/arm-cores.def \
> /dev/null; then
# Ok
true
else
echo "Unknown CPU used in --with-$which=$val" 1>&2
--- 2266,2281 ----
# See if it matches any of the entries in arm-cores.def
eval "val=\$with_$which"
if [ x"$val" = x ] \
! || grep "^ARM_CORE(\"$val\"," \
${srcdir}/config/arm/arm-cores.def \
> /dev/null; then
# Ok
+ new_val=`grep "^ARM_CORE(\"$val\"," \
+ ${srcdir}/config/arm/arm-cores.def | \
+ sed -e 's/^[^,]*,[ ]*//' | \
+ sed -e 's/,.*$//'`
+ eval "with_$which=$new_val"
+ echo "For $val real value is $new_val"
true
else
echo "Unknown CPU used in --with-$which=$val" 1>&2
Index: config/arm/arm-cores.def
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm-cores.def,v
retrieving revision 1.7
diff -p -r1.7 arm-cores.def
*** config/arm/arm-cores.def 3 Aug 2004 13:52:49 -0000 1.7
--- config/arm/arm-cores.def 1 Sep 2004 12:36:06 -0000
***************
*** 21,30 ****
/* Before using #include to read this file, define a macro:
! ARM_CORE(CORE_NAME, ARCH, FLAGS, COSTS)
! The CORE_NAME is the name of the core, represented as an identifier
! rather than a string constant.
ARCH is the architecture revision implemeted by the chip.
FLAGS are the bitwise-or of the traits that apply to that core.
This need not include flags implied by the architecture.
--- 21,30 ----
/* Before using #include to read this file, define a macro:
! ARM_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS)
! The CORE_NAME is the name of the core, represented as a string constant.
! The CORE_IDENT is the name of the core, represented as an identifier.
ARCH is the architecture revision implemeted by the chip.
FLAGS are the bitwise-or of the traits that apply to that core.
This need not include flags implied by the architecture.
***************
*** 36,112 ****
Some tools assume no whitespace up to the first "," in each entry. */
/* V2/V2A Architecture Processors */
! ARM_CORE(arm2, 2, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm250, 2, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm3, 2, FL_CO_PROC | FL_MODE26, slowmul)
/* V3 Architecture Processors */
! ARM_CORE(arm6, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm60, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm600, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm610, 3, FL_MODE26, slowmul)
! ARM_CORE(arm620, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm7, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm70, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm700, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm700i, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE(arm710, 3, FL_MODE26, slowmul)
! ARM_CORE(arm720, 3, FL_MODE26, slowmul)
! ARM_CORE(arm710c, 3, FL_MODE26, slowmul)
! ARM_CORE(arm7100, 3, FL_MODE26, slowmul)
! ARM_CORE(arm7500, 3, FL_MODE26, slowmul)
/* Doesn't have an external co-proc, but does have embedded fpa. */
! ARM_CORE(arm7500fe, 3, FL_CO_PROC | FL_MODE26, slowmul)
/* V3M Architecture Processors */
! /* arm7m doesn't exist on its own, but only with D, (and I), but
those don't alter the code, so arm7m is sometimes used. */
! ARM_CORE(arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul)
! ARM_CORE(arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul)
! ARM_CORE(arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul)
/* V4 Architecture Processors */
! ARM_CORE(arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul)
! ARM_CORE(arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul)
! ARM_CORE(strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
! ARM_CORE(strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
! ARM_CORE(strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
! ARM_CORE(strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
/* V4T Architecture Processors */
! ARM_CORE(arm7tdmi, 4T, FL_CO_PROC , fastmul)
! ARM_CORE(arm710t, 4T, 0 , fastmul)
! ARM_CORE(arm720t, 4T, 0 , fastmul)
! ARM_CORE(arm740t, 4T, 0 , fastmul)
! ARM_CORE(arm9, 4T, FL_LDSCHED, fastmul)
! ARM_CORE(arm9tdmi, 4T, FL_LDSCHED, fastmul)
! ARM_CORE(arm920, 4T, FL_LDSCHED, fastmul)
! ARM_CORE(arm920t, 4T, FL_LDSCHED, fastmul)
! ARM_CORE(arm922t, 4T, FL_LDSCHED, fastmul)
! ARM_CORE(arm940t, 4T, FL_LDSCHED, fastmul)
! ARM_CORE(ep9312, 4T, FL_LDSCHED | FL_CIRRUS, fastmul)
/* V5T Architecture Processors */
! ARM_CORE(arm10tdmi, 5T, FL_LDSCHED, fastmul)
! ARM_CORE(arm1020t, 5T, FL_LDSCHED, fastmul)
/* V5TE Architecture Processors */
! ARM_CORE(arm9e, 5TE, FL_LDSCHED, 9e)
! ARM_CORE(arm946es, 5TE, FL_LDSCHED, 9e)
! ARM_CORE(arm966es, 5TE, FL_LDSCHED, 9e)
! ARM_CORE(arm968es, 5TE, FL_LDSCHED, 9e)
! ARM_CORE(arm10e, 5TE, FL_LDSCHED, fastmul)
! ARM_CORE(arm1020e, 5TE, FL_LDSCHED, fastmul)
! ARM_CORE(arm1022e, 5TE, FL_LDSCHED, fastmul)
! ARM_CORE(xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
! ARM_CORE(iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
/* V5TEJ Architecture Processors */
! ARM_CORE(arm926ejs, 5TEJ, 0, 9e)
! ARM_CORE(arm1026ejs, 5TEJ, 0, 9e)
/* V6 Architecture Processors */
! ARM_CORE(arm1136js, 6J, 0, 9e)
! ARM_CORE(arm1136jfs, 6J, FL_VFPV2, 9e)
--- 36,113 ----
Some tools assume no whitespace up to the first "," in each entry. */
/* V2/V2A Architecture Processors */
! ARM_CORE("arm2", arm2, 2, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm250", arm250, 2, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm3", arm3, 2, FL_CO_PROC | FL_MODE26, slowmul)
/* V3 Architecture Processors */
! ARM_CORE("arm6", arm6, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm60", arm60, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm600", arm600, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm610", arm610, 3, FL_MODE26, slowmul)
! ARM_CORE("arm620", arm620, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm7", arm7, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm7d", arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm7di", arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm70", arm70, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm700", arm700, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm700i", arm700i, 3, FL_CO_PROC | FL_MODE26, slowmul)
! ARM_CORE("arm710", arm710, 3, FL_MODE26, slowmul)
! ARM_CORE("arm720", arm720, 3, FL_MODE26, slowmul)
! ARM_CORE("arm710c", arm710c, 3, FL_MODE26, slowmul)
! ARM_CORE("arm7100", arm7100, 3, FL_MODE26, slowmul)
! ARM_CORE("arm7500", arm7500, 3, FL_MODE26, slowmul)
/* Doesn't have an external co-proc, but does have embedded fpa. */
! ARM_CORE("arm7500fe", arm7500fe, 3, FL_CO_PROC | FL_MODE26, slowmul)
/* V3M Architecture Processors */
! /* arm7m doesn't exist on its own, but only with D, ("and", and I), but
those don't alter the code, so arm7m is sometimes used. */
! ARM_CORE("arm7m", arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul)
! ARM_CORE("arm7dm", arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul)
! ARM_CORE("arm7dmi", arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul)
/* V4 Architecture Processors */
! ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul)
! ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul)
! ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
! ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
! ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
! ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul)
/* V4T Architecture Processors */
! ARM_CORE("arm7tdmi", arm7tdmi, 4T, FL_CO_PROC , fastmul)
! ARM_CORE("arm7tdmi-s", arm7tdmis, 4T, FL_CO_PROC , fastmul)
! ARM_CORE("arm710t", arm710t, 4T, 0 , fastmul)
! ARM_CORE("arm720t", arm720t, 4T, 0 , fastmul)
! ARM_CORE("arm740t", arm740t, 4T, 0 , fastmul)
! ARM_CORE("arm9", arm9, 4T, FL_LDSCHED, fastmul)
! ARM_CORE("arm9tdmi", arm9tdmi, 4T, FL_LDSCHED, fastmul)
! ARM_CORE("arm920", arm920, 4T, FL_LDSCHED, fastmul)
! ARM_CORE("arm920t", arm920t, 4T, FL_LDSCHED, fastmul)
! ARM_CORE("arm922t", arm922t, 4T, FL_LDSCHED, fastmul)
! ARM_CORE("arm940t", arm940t, 4T, FL_LDSCHED, fastmul)
! ARM_CORE("ep9312", ep9312, 4T, FL_LDSCHED | FL_CIRRUS, fastmul)
/* V5T Architecture Processors */
! ARM_CORE("arm10tdmi", arm10tdmi, 5T, FL_LDSCHED, fastmul)
! ARM_CORE("arm1020t", arm1020t, 5T, FL_LDSCHED, fastmul)
/* V5TE Architecture Processors */
! ARM_CORE("arm9e", arm9e, 5TE, FL_LDSCHED, 9e)
! ARM_CORE("arm946e-s", arm946es, 5TE, FL_LDSCHED, 9e)
! ARM_CORE("arm966e-s", arm966es, 5TE, FL_LDSCHED, 9e)
! ARM_CORE("arm968e-s", arm968es, 5TE, FL_LDSCHED, 9e)
! ARM_CORE("arm10e", arm10e, 5TE, FL_LDSCHED, fastmul)
! ARM_CORE("arm1020e", arm1020e, 5TE, FL_LDSCHED, fastmul)
! ARM_CORE("arm1022e", arm1022e, 5TE, FL_LDSCHED, fastmul)
! ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
! ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
/* V5TEJ Architecture Processors */
! ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, 0, 9e)
! ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, 0, 9e)
/* V6 Architecture Processors */
! ARM_CORE("arm1136j-s", arm1136js, 6J, 0, 9e)
! ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_VFPV2, 9e)
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.400
diff -p -r1.400 arm.c
*** config/arm/arm.c 1 Sep 2004 03:45:19 -0000 1.400
--- config/arm/arm.c 1 Sep 2004 12:36:07 -0000
*************** struct processors
*** 500,507 ****
static const struct processors all_cores[] =
{
/* ARM Cores */
! #define ARM_CORE(NAME, ARCH, FLAGS, COSTS) \
! {#NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, arm_##COSTS##_rtx_costs},
#include "arm-cores.def"
#undef ARM_CORE
{NULL, arm_none, NULL, 0, NULL}
--- 500,507 ----
static const struct processors all_cores[] =
{
/* ARM Cores */
! #define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
! {NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, arm_##COSTS##_rtx_costs},
#include "arm-cores.def"
#undef ARM_CORE
{NULL, arm_none, NULL, 0, NULL}
Index: config/arm/arm.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.255
diff -p -r1.255 arm.h
*** config/arm/arm.h 29 Aug 2004 22:18:25 -0000 1.255
--- config/arm/arm.h 1 Sep 2004 12:36:08 -0000
*************** extern char arm_arch_name[];
*** 83,90 ****
/* The various ARM cores. */
enum processor_type
{
! #define ARM_CORE(NAME, ARCH, FLAGS, COSTS) \
! NAME,
#include "arm-cores.def"
#undef ARM_CORE
/* Used to indicate that no processor has been specified. */
--- 83,90 ----
/* The various ARM cores. */
enum processor_type
{
! #define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
! IDENT,
#include "arm-cores.def"
#undef ARM_CORE
/* Used to indicate that no processor has been specified. */
*************** enum processor_type
*** 93,100 ****
enum target_cpus
{
! #define ARM_CORE(NAME, ARCH, FLAGS, COSTS) \
! TARGET_CPU_##NAME,
#include "arm-cores.def"
#undef ARM_CORE
TARGET_CPU_generic
--- 93,100 ----
enum target_cpus
{
! #define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
! TARGET_CPU_##IDENT,
#include "arm-cores.def"
#undef ARM_CORE
TARGET_CPU_generic
Index: config/arm/gentune.sh
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/gentune.sh,v
retrieving revision 1.1
diff -p -r1.1 gentune.sh
*** config/arm/gentune.sh 3 Aug 2004 13:27:02 -0000 1.1
--- config/arm/gentune.sh 1 Sep 2004 12:36:08 -0000
***************
*** 5,11 ****
echo ";; -*- buffer-read-only: t -*-"
echo ";; Generated automatically by gentune.sh from arm-cores.def"
! allcores=`awk -F'[(,]' '/^ARM_CORE/ { cores = cores$2"," } END { print cores } ' $1`
echo "(define_attr \"tune\""
echo " \"$allcores\"" | sed -e 's/,"$/"/'
--- 5,11 ----
echo ";; -*- buffer-read-only: t -*-"
echo ";; Generated automatically by gentune.sh from arm-cores.def"
! allcores=`awk -F'[(, ]+' '/^ARM_CORE/ { cores = cores$3"," } END { print cores } ' $1`
echo "(define_attr \"tune\""
echo " \"$allcores\"" | sed -e 's/,"$/"/'
Index: doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.518
diff -p -r1.518 invoke.texi
*** doc/invoke.texi 29 Aug 2004 09:19:30 -0000 1.518
--- doc/invoke.texi 1 Sep 2004 12:36:12 -0000
*************** assembly code. Permissible names are: @
*** 6595,6608 ****
@samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
! @samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm8},
! @samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
! @samp{arm920t}, @samp{arm922t}, @samp{arm946es}, @samp{arm966es},
! @samp{arm968es}, @samp{arm926ejs}, @samp{arm940t}, @samp{arm9tdmi},
! @samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ejs},
@samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
! @samp{arm1136js}, @samp{arm1136jfs} ,@samp{xscale}, @samp{iwmmxt},
@samp{ep9312}.
@itemx -mtune=@var{name}
--- 6595,6608 ----
@samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
! @samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm7tdmi-s},
! @samp{arm8}, @samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
! @samp{arm920t}, @samp{arm922t}, @samp{arm946e-s}, @samp{arm966e-s},
! @samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi},
! @samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s},
@samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
! @samp{arm1136j-s}, @samp{arm1136jf-s} ,@samp{xscale}, @samp{iwmmxt},
@samp{ep9312}.
@itemx -mtune=@var{name}