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[committed] Fix yesterday's mips16 li/neg patch
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 15 Jul 2004 19:03:57 +0100
- Subject: [committed] Fix yesterday's mips16 li/neg patch
I committed a patch yesterday to extend the SImode mips16 li/neg
splitter to cater for all modes, not just SImode. Unfortunately,
it used the original mode for the "li" part, so a HImode move like:
(set (reg:HI x) (const_int -y))
would become:
(set (reg:HI x) (const_int y))
(set (reg:SI x) (neg:SI (reg:SI x)))
Of course, -0x8000 is a valid HImode constant, but 0x8000 isn't.
This caused an ICE building mips64vrel-elf. Tsk. Obvious in
hindsight...
Fixed by using SImode for both parts. It fixes the mips64vrel-elf
build failure. Also bootstrapped & tested on mips64{,el}-linux-gnu.
Applied to trunk.
Richard
* config/mips/mips.md: In the mips16 li/neg splitter, use SImode for
the destination of the li as well as for the neg.
Index: config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.252
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.252 mips.md
*** config/mips/mips.md 14 Jul 2004 10:02:32 -0000 1.252
--- config/mips/mips.md 15 Jul 2004 17:50:33 -0000
*************** (define_split
*** 4748,4760 ****
[(set (match_operand 0 "register_operand")
(match_operand 1 "const_int_operand"))]
"TARGET_MIPS16 && reload_completed && INTVAL (operands[1]) < 0"
! [(set (match_dup 0)
! (match_dup 2))
! (set (match_dup 3)
! (neg:SI (match_dup 3)))]
{
! operands[2] = GEN_INT (-INTVAL (operands[1]));
! operands[3] = gen_lowpart (SImode, operands[0]);
})
;; The HI and LO registers are not truly independent. If we move an mthi
--- 4607,4619 ----
[(set (match_operand 0 "register_operand")
(match_operand 1 "const_int_operand"))]
"TARGET_MIPS16 && reload_completed && INTVAL (operands[1]) < 0"
! [(set (match_dup 2)
! (match_dup 3))
! (set (match_dup 2)
! (neg:SI (match_dup 2)))]
{
! operands[2] = gen_lowpart (SImode, operands[0]);
! operands[3] = GEN_INT (-INTVAL (operands[1]));
})
;; The HI and LO registers are not truly independent. If we move an mthi