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e500 breakage caused by altivec patch


[Engage brain, then hit send.

Sent to wrong list.]

Hi folks.

The referenced patch below is causing the testcase here to fail:

    http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14924

...nevermind that the bug report is reporting another ICE, but the
patch below causes the builtin to be built incorrectly.

2003-10-17  Segher Boessenkool  <boessen@de.ibm.com>
            Hartmut Penner  <hpenner@de.ibm.com>

        * config/rs6000/altivec.md ("altivec_dst", "altivec_dstt",
        "altivec_dstst", "altivec_dststt", "altivec_lvsl", "altivec_lvsr",
        "altivec_lvebx", "altivec_lvehx", "altivec_lvewx", "altivec_lvxl",
        "altivec_lvx", "altivec_stvx", "altivec_stvxl", "altivec_stvebx",
        "altivec_stvehx", "altivec_stvewx"): Use a memory_operand.
        * config/rs6000/rs6000.c (altivec_expand_lv_builtin): New function.
        (altivec_expand_stv_builtin): Adjust for the memory_operand.
        (altivec_expand_builtin): Call altivec_expand_lv_builtin.
        (altivec_init_builtins): Use `long int' for memory offsets.

The behavior of altivec_expand_stv_builtin changed, and the SPE
extensions were hijacking it.  Rather than kludging AltiVec's version
to deal with SPE, I decided to make an SPE specific version.

The patch below fixes PR/14924.  I'm committing to mainline and 3.4.

Cheers.

	PR/14924
	* config/rs6000/rs6000.c (spe_expand_stv_builtin): New.

Index: config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.576.2.18
diff -c -p -r1.576.2.18 rs6000.c
*** config/rs6000/rs6000.c	11 May 2004 23:45:33 -0000	1.576.2.18
--- config/rs6000/rs6000.c	26 May 2004 23:32:58 -0000
*************** static void enable_mask_for_builtins (st
*** 363,368 ****
--- 363,369 ----
  				      enum rs6000_builtins);
  static void spe_init_builtins (void);
  static rtx spe_expand_builtin (tree, rtx, bool *);
+ static rtx spe_expand_stv_builtin (enum insn_code, tree);
  static rtx spe_expand_predicate_builtin (enum insn_code, tree, rtx);
  static rtx spe_expand_evsel_builtin (enum insn_code, tree, rtx);
  static int rs6000_emit_int_cmove (rtx, rtx, rtx, rtx);
*************** altivec_expand_lv_builtin (enum insn_cod
*** 5676,5681 ****
--- 5677,5715 ----
  }
  
  static rtx
+ spe_expand_stv_builtin (enum insn_code icode, tree arglist)
+ {
+   tree arg0 = TREE_VALUE (arglist);
+   tree arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+   tree arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+   rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+   rtx op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+   rtx op2 = expand_expr (arg2, NULL_RTX, VOIDmode, 0);
+   rtx pat;
+   enum machine_mode mode0 = insn_data[icode].operand[0].mode;
+   enum machine_mode mode1 = insn_data[icode].operand[1].mode;
+   enum machine_mode mode2 = insn_data[icode].operand[2].mode;
+ 
+   /* Invalid arguments.  Bail before doing anything stoopid!  */
+   if (arg0 == error_mark_node
+       || arg1 == error_mark_node
+       || arg2 == error_mark_node)
+     return const0_rtx;
+ 
+   if (! (*insn_data[icode].operand[2].predicate) (op0, mode2))
+     op0 = copy_to_mode_reg (mode2, op0);
+   if (! (*insn_data[icode].operand[0].predicate) (op1, mode0))
+     op1 = copy_to_mode_reg (mode0, op1);
+   if (! (*insn_data[icode].operand[1].predicate) (op2, mode1))
+     op2 = copy_to_mode_reg (mode1, op2);
+ 
+   pat = GEN_FCN (icode) (op1, op2, op0);
+   if (pat)
+     emit_insn (pat);
+   return NULL_RTX;
+ }
+ 
+ static rtx
  altivec_expand_stv_builtin (enum insn_code icode, tree arglist)
  {
    tree arg0 = TREE_VALUE (arglist);
*************** spe_expand_builtin (tree exp, rtx target
*** 6190,6222 ****
    switch (fcode)
      {
      case SPE_BUILTIN_EVSTDDX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstddx, arglist);
      case SPE_BUILTIN_EVSTDHX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstdhx, arglist);
      case SPE_BUILTIN_EVSTDWX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstdwx, arglist);
      case SPE_BUILTIN_EVSTWHEX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwhex, arglist);
      case SPE_BUILTIN_EVSTWHOX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwhox, arglist);
      case SPE_BUILTIN_EVSTWWEX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwwex, arglist);
      case SPE_BUILTIN_EVSTWWOX:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwwox, arglist);
      case SPE_BUILTIN_EVSTDD:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstdd, arglist);
      case SPE_BUILTIN_EVSTDH:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstdh, arglist);
      case SPE_BUILTIN_EVSTDW:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstdw, arglist);
      case SPE_BUILTIN_EVSTWHE:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwhe, arglist);
      case SPE_BUILTIN_EVSTWHO:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwho, arglist);
      case SPE_BUILTIN_EVSTWWE:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwwe, arglist);
      case SPE_BUILTIN_EVSTWWO:
!       return altivec_expand_stv_builtin (CODE_FOR_spe_evstwwo, arglist);
      case SPE_BUILTIN_MFSPEFSCR:
        icode = CODE_FOR_spe_mfspefscr;
        tmode = insn_data[icode].operand[0].mode;
--- 6224,6256 ----
    switch (fcode)
      {
      case SPE_BUILTIN_EVSTDDX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstddx, arglist);
      case SPE_BUILTIN_EVSTDHX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstdhx, arglist);
      case SPE_BUILTIN_EVSTDWX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstdwx, arglist);
      case SPE_BUILTIN_EVSTWHEX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwhex, arglist);
      case SPE_BUILTIN_EVSTWHOX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwhox, arglist);
      case SPE_BUILTIN_EVSTWWEX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwwex, arglist);
      case SPE_BUILTIN_EVSTWWOX:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwwox, arglist);
      case SPE_BUILTIN_EVSTDD:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstdd, arglist);
      case SPE_BUILTIN_EVSTDH:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstdh, arglist);
      case SPE_BUILTIN_EVSTDW:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstdw, arglist);
      case SPE_BUILTIN_EVSTWHE:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwhe, arglist);
      case SPE_BUILTIN_EVSTWHO:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwho, arglist);
      case SPE_BUILTIN_EVSTWWE:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwwe, arglist);
      case SPE_BUILTIN_EVSTWWO:
!       return spe_expand_stv_builtin (CODE_FOR_spe_evstwwo, arglist);
      case SPE_BUILTIN_MFSPEFSCR:
        icode = CODE_FOR_spe_mfspefscr;
        tmode = insn_data[icode].operand[0].mode;


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