This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH] Reimplement log*f2 patterns with float_truncate insn


Hello!

This amost trivial patch reimplements log*f2 patterns with newly introduced float_truncate insn. Patch is tested on i686-pc-linux-gnu.

2004-05-03 Uros Bizjak <uros@kss-loka.si>

       * config/i386/i386.md (*fyl2x_sfxf3, *fyl2x_dfxf3): Remove insn
       definition.
       (log?f2, log10?f2, log2?f2): Reimplement expanders with
       float_truncate insn.
       (*fxtractsf3, *fxtractdf3): Remove insn definition.
       (logb?f2): Reimplement expanders with float_truncate insn.

OK for mainline?

Uros.
Index: gcc/config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.533
diff -u -r1.533 i386.md
--- gcc/config/i386/i386.md	3 May 2004 05:31:41 -0000	1.533
+++ gcc/config/i386/i386.md	3 May 2004 06:24:56 -0000
@@ -15458,30 +15458,6 @@
   emit_move_insn (operands[3], CONST1_RTX (XFmode));  /* fld1 */
 })
 
-(define_insn "*fyl2x_sfxf3"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-         (unspec:SF [(match_operand:SF 2 "register_operand" "0")
-		     (match_operand:XF 1 "register_operand" "u")]
-		    UNSPEC_FYL2X))
-   (clobber (match_scratch:SF 3 "=1"))]
-  "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
-   && flag_unsafe_math_optimizations"
-  "fyl2x"
-  [(set_attr "type" "fpspc")
-   (set_attr "mode" "SF")])
-
-(define_insn "*fyl2x_dfxf3"
-  [(set (match_operand:DF 0 "register_operand" "=f")
-         (unspec:DF [(match_operand:DF 2 "register_operand" "0")
-		     (match_operand:XF 1 "register_operand" "u")]
-		    UNSPEC_FYL2X))
-   (clobber (match_scratch:DF 3 "=1"))]
-  "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
-   && flag_unsafe_math_optimizations"
-  "fyl2x"
-  [(set_attr "type" "fpspc")
-   (set_attr "mode" "DF")])
-
 (define_insn "*fyl2x_xf3"
   [(set (match_operand:XF 0 "register_operand" "=f")
         (unspec:XF [(match_operand:XF 2 "register_operand" "0")
@@ -15495,33 +15471,47 @@
    (set_attr "mode" "XF")])
 
 (define_expand "logsf2"
-  [(parallel [(set (match_operand:SF 0 "register_operand" "")
-		   (unspec:SF [(match_operand:SF 1 "register_operand" "")
-			       (match_dup 2)] UNSPEC_FYL2X))
-	      (clobber (match_scratch:SF 3 ""))])]
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:SF 1 "register_operand" "")))
+   (parallel [(set (match_dup 4)
+		   (unspec:XF [(match_dup 2)
+			       (match_dup 3)] UNSPEC_FYL2X))
+	      (clobber (match_scratch:XF 5 ""))])
+   (set (match_operand:SF 0 "register_operand" "")
+	(float_truncate:SF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   rtx temp;
 
   operands[2] = gen_reg_rtx (XFmode);
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
+
   temp = standard_80387_constant_rtx (4); /* fldln2 */
-  emit_move_insn (operands[2], temp);
+  emit_move_insn (operands[3], temp);
 })
 
 (define_expand "logdf2"
-  [(parallel [(set (match_operand:DF 0 "register_operand" "")
-		   (unspec:DF [(match_operand:DF 1 "register_operand" "")
-			       (match_dup 2)] UNSPEC_FYL2X))
-	      (clobber (match_scratch:DF 3 ""))])]
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:DF 1 "register_operand" "")))
+   (parallel [(set (match_dup 4)
+		   (unspec:XF [(match_dup 2)
+			       (match_dup 3)] UNSPEC_FYL2X))
+	      (clobber (match_scratch:XF 5 ""))])
+   (set (match_operand:DF 0 "register_operand" "")
+	(float_truncate:DF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   rtx temp;
 
   operands[2] = gen_reg_rtx (XFmode);
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
+
   temp = standard_80387_constant_rtx (4); /* fldln2 */
-  emit_move_insn (operands[2], temp);
+  emit_move_insn (operands[3], temp);
 })
 
 (define_expand "logxf2"
@@ -15540,33 +15530,47 @@
 })
 
 (define_expand "log10sf2"
-  [(parallel [(set (match_operand:SF 0 "register_operand" "")
-		   (unspec:SF [(match_operand:SF 1 "register_operand" "")
-			       (match_dup 2)] UNSPEC_FYL2X))
-	      (clobber (match_scratch:SF 3 ""))])]
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:SF 1 "register_operand" "")))
+   (parallel [(set (match_dup 4)
+		   (unspec:XF [(match_dup 2)
+			       (match_dup 3)] UNSPEC_FYL2X))
+	      (clobber (match_scratch:XF 5 ""))])
+   (set (match_operand:SF 0 "register_operand" "")
+	(float_truncate:SF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   rtx temp;
 
   operands[2] = gen_reg_rtx (XFmode);
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
+
   temp = standard_80387_constant_rtx (3); /* fldlg2 */
-  emit_move_insn (operands[2], temp);
+  emit_move_insn (operands[3], temp);
 })
 
 (define_expand "log10df2"
-  [(parallel [(set (match_operand:DF 0 "register_operand" "")
-		   (unspec:DF [(match_operand:DF 1 "register_operand" "")
-			       (match_dup 2)] UNSPEC_FYL2X))
-	      (clobber (match_scratch:DF 3 ""))])]
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:DF 1 "register_operand" "")))
+   (parallel [(set (match_dup 4)
+		   (unspec:XF [(match_dup 2)
+			       (match_dup 3)] UNSPEC_FYL2X))
+	      (clobber (match_scratch:XF 5 ""))])
+   (set (match_operand:DF 0 "register_operand" "")
+	(float_truncate:DF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   rtx temp;
 
   operands[2] = gen_reg_rtx (XFmode);
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
+
   temp = standard_80387_constant_rtx (3); /* fldlg2 */
-  emit_move_insn (operands[2], temp);
+  emit_move_insn (operands[3], temp);
 })
 
 (define_expand "log10xf2"
@@ -15585,28 +15589,41 @@
 })
 
 (define_expand "log2sf2"
-  [(parallel [(set (match_operand:SF 0 "register_operand" "")
-		   (unspec:SF [(match_operand:SF 1 "register_operand" "")
-			       (match_dup 2)] UNSPEC_FYL2X))
-	      (clobber (match_scratch:SF 3 ""))])]
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:SF 1 "register_operand" "")))
+   (parallel [(set (match_dup 4)
+		   (unspec:XF [(match_dup 2)
+			       (match_dup 3)] UNSPEC_FYL2X))
+	      (clobber (match_scratch:XF 5 ""))])
+   (set (match_operand:SF 0 "register_operand" "")
+	(float_truncate:SF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   operands[2] = gen_reg_rtx (XFmode);
-  emit_move_insn (operands[2], CONST1_RTX (XFmode));  /* fld1 */
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
 
+  emit_move_insn (operands[3], CONST1_RTX (XFmode));  /* fld1 */
 })
 
 (define_expand "log2df2"
-  [(parallel [(set (match_operand:DF 0 "register_operand" "")
-		   (unspec:DF [(match_operand:DF 1 "register_operand" "")
-			       (match_dup 2)] UNSPEC_FYL2X))
-	      (clobber (match_scratch:DF 3 ""))])]
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:DF 1 "register_operand" "")))
+   (parallel [(set (match_dup 4)
+		   (unspec:XF [(match_dup 2)
+			       (match_dup 3)] UNSPEC_FYL2X))
+	      (clobber (match_scratch:XF 5 ""))])
+   (set (match_operand:DF 0 "register_operand" "")
+	(float_truncate:DF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   operands[2] = gen_reg_rtx (XFmode);
-  emit_move_insn (operands[2], CONST1_RTX (XFmode));  /* fld1 */
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
+
+  emit_move_insn (operands[3], CONST1_RTX (XFmode));  /* fld1 */
 })
 
 (define_expand "log2xf2"
@@ -15621,65 +15638,51 @@
   emit_move_insn (operands[2], CONST1_RTX (XFmode));  /* fld1 */
 })
 
-(define_insn "*fxtractdf3"
-  [(set (match_operand:DF 0 "register_operand" "=f")
-	(unspec:DF [(match_operand:DF 2 "register_operand" "0")]
+(define_insn "*fxtractxf3"
+  [(set (match_operand:XF 0 "register_operand" "=f")
+	(unspec:XF [(match_operand:XF 2 "register_operand" "0")]
 		   UNSPEC_XTRACT_FRACT))
-   (set (match_operand:DF 1 "register_operand" "=u")
-        (unspec:DF [(match_dup 2)] UNSPEC_XTRACT_EXP))]
+   (set (match_operand:XF 1 "register_operand" "=u")
+        (unspec:XF [(match_dup 2)] UNSPEC_XTRACT_EXP))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 
    && flag_unsafe_math_optimizations"
   "fxtract"
   [(set_attr "type" "fpspc")
-   (set_attr "mode" "DF")])
+   (set_attr "mode" "XF")])
 
-(define_expand "logbdf2"
-  [(parallel [(set (match_dup 2)
-		   (unspec:DF [(match_operand:DF 1 "register_operand" "")]
-			      UNSPEC_XTRACT_FRACT))
-	      (set (match_operand:DF 0 "register_operand" "")
-		   (unspec:DF [(match_dup 1)] UNSPEC_XTRACT_EXP))])]
+(define_expand "logbsf2"
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:SF 1 "register_operand" "")))
+   (parallel [(set (match_dup 3)
+		   (unspec:XF [(match_dup 2)] UNSPEC_XTRACT_FRACT))
+	      (set (match_dup 4)
+		   (unspec:XF [(match_dup 2)] UNSPEC_XTRACT_EXP))])
+   (set (match_operand:SF 0 "register_operand" "")
+	(float_truncate:SF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 
    && flag_unsafe_math_optimizations"
 {
-  operands[2] = gen_reg_rtx (DFmode);
+  operands[2] = gen_reg_rtx (XFmode);
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
 })
 
-(define_insn "*fxtractsf3"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-	(unspec:SF [(match_operand:SF 2 "register_operand" "0")]
-		   UNSPEC_XTRACT_FRACT))
-   (set (match_operand:SF 1 "register_operand" "=u")
-        (unspec:SF [(match_dup 2)] UNSPEC_XTRACT_EXP))]
-  "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 
-   && flag_unsafe_math_optimizations"
-  "fxtract"
-  [(set_attr "type" "fpspc")
-   (set_attr "mode" "SF")])
-
-(define_expand "logbsf2"
-  [(parallel [(set (match_dup 2)
-		   (unspec:SF [(match_operand:SF 1 "register_operand" "")]
-			      UNSPEC_XTRACT_FRACT))
-	      (set (match_operand:SF 0 "register_operand" "")
-		   (unspec:SF [(match_dup 1)] UNSPEC_XTRACT_EXP))])]
+(define_expand "logbdf2"
+  [(set (match_dup 2)
+	(float_extend:XF (match_operand:DF 1 "register_operand" "")))
+   (parallel [(set (match_dup 3)
+		   (unspec:XF [(match_dup 2)] UNSPEC_XTRACT_FRACT))
+	      (set (match_dup 4)
+		   (unspec:XF [(match_dup 2)] UNSPEC_XTRACT_EXP))])
+   (set (match_operand:DF 0 "register_operand" "")
+	(float_truncate:DF (match_dup 4)))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 
    && flag_unsafe_math_optimizations"
 {
-  operands[2] = gen_reg_rtx (SFmode);
+  operands[2] = gen_reg_rtx (XFmode);
+  operands[3] = gen_reg_rtx (XFmode);
+  operands[4] = gen_reg_rtx (XFmode);
 })
-
-(define_insn "*fxtractxf3"
-  [(set (match_operand:XF 0 "register_operand" "=f")
-	(unspec:XF [(match_operand:XF 2 "register_operand" "0")]
-		   UNSPEC_XTRACT_FRACT))
-   (set (match_operand:XF 1 "register_operand" "=u")
-        (unspec:XF [(match_dup 2)] UNSPEC_XTRACT_EXP))]
-  "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 
-   && flag_unsafe_math_optimizations"
-  "fxtract"
-  [(set_attr "type" "fpspc")
-   (set_attr "mode" "XF")])
 
 (define_expand "logbxf2"
   [(parallel [(set (match_dup 2)

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]