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Re: [Patch] [PPC] Convert peephole to peephole2
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Andrew Pinski <pinskia at physics dot uc dot edu>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Wed, 28 Apr 2004 13:10:16 -0400
- Subject: Re: [Patch] [PPC] Convert peephole to peephole2
- References: <B5202716-9929-11D8-9C35-000393A6D2F2@physics.uc.edu>
* config/rs6000/rs6000.c (registers_ok_for_quad_peep):
Return false if we have pseudo registers.
(addrs_ok_for_quad_peep): Rename to ...
(mems_ok_for_quad_peep): this.
Add check for volatile memory.
* config/rs6000/rs6000-protos.h (addrs_ok_for_quad_peep):
Rename to ...
(mems_ok_for_quad_peep): this.
* config/rs6000/rs6000.md: Change peephole's for lfq/stq
to peephole2's.
(lfq_power2): New instruction.
(stfq_power2): Likewise.
This is okay, except:
+ /* We might have been passed a pseudo register. */
+ if (!HARD_REGISTER_NUM_P (REGNO (reg1))
+ || !HARD_REGISTER_NUM_P (REGNO (reg2)))
+ return 0;
Can't you just test FP_REGNO_P (REGNO (reg1)), instead of
HARD_REGISTER_NUM_P()? If we're testing for FP mode and hard registers,
we might as well ensure the operand is in FPRs before getting to the
register constraints.
David