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[Bug target/15106] Vector varargs failure for AltiVec on ppc32 linux
- From: Hartmut Penner <HPENNER at de dot ibm dot com>
- To: Aldy Hernandez <aldyh at redhat dot com>, Janis Johnson <janis187 at us dot ibm dot com>
- Cc: gcc-patches at gcc dot gnu dot org, Alan Modra <amodra at bigpond dot net dot au>
- Date: Tue, 27 Apr 2004 13:02:29 +0200
- Subject: [Bug target/15106] Vector varargs failure for AltiVec on ppc32 linux
Hello,
Janis posted a bug with a testcase, where all valid combination of
-maltivec and -mabi=altivec are used. This testcase discovered some
shortcomings
on ppc32 & ppc64 linux regarding AltiVec.
Pls take a look at following proposed fix, it is only a draft, need to
fully test etc.
It fixes testcase except for the combination -maltivec -mabi=no-altivec on
ppc64,
which I consider a invalid combination.
regards, Hartmut
Index: gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.630
diff -u -p -r1.630 rs6000.c
--- gcc/config/rs6000/rs6000.c 24 Apr 2004 06:37:18 -0000 1.630
+++ gcc/config/rs6000/rs6000.c 27 Apr 2004 11:00:02 -0000
@@ -4481,7 +4481,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum
n_words = rs6000_arg_size (mode, type);
/* Long long and SPE vectors are put in odd registers. */
- if (n_words == 2 && (gregno & 1) == 0)
+ if (n_words >= 2 && (gregno & 1) == 0)
gregno += 1;
/* Long long does not split between registers and stack. */
@@ -4995,7 +4995,7 @@ rs6000_va_arg (tree valist, tree type)
addr_rtx = gen_reg_rtx (Pmode);
/* AltiVec vectors never go in registers. */
- if (!TARGET_ALTIVEC || TREE_CODE (type) != VECTOR_TYPE)
+ if (!TARGET_ALTIVEC_ABI || TREE_CODE (type) != VECTOR_TYPE)
{
TREE_THIS_VOLATILE (reg) = 1;
emit_cmp_and_jump_insns
@@ -5050,7 +5050,7 @@ rs6000_va_arg (tree valist, tree type)
case we need to get the vectors from the overflow area, but
remember where the GPRs and FPRs are. */
if (n_reg > 1 && (TREE_CODE (type) != VECTOR_TYPE
- || !TARGET_ALTIVEC))
+ || !TARGET_ALTIVEC_ABI))
{
t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, build_int_2 (8, 0));
TREE_SIDE_EFFECTS (t) = 1;
@@ -5065,7 +5065,7 @@ rs6000_va_arg (tree valist, tree type)
int align;
/* AltiVec vectors are 16 byte aligned. */
- if (TARGET_ALTIVEC && TREE_CODE (type) == VECTOR_TYPE)
+ if (TARGET_ALTIVEC_ABI && TREE_CODE (type) == VECTOR_TYPE)
align = 15;
else
align = 7;