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[arm] Fix maverick load/store offsets
- From: Paul Brook <paul at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: "Richard Earnshaw" <Richard dot Earnshaw at arm dot com>
- Date: Fri, 23 Apr 2004 18:05:04 +0100
- Subject: [arm] Fix maverick load/store offsets
- Organization: CodeSourcery
The following patch corrects the maverick coprocessor load/store offset range
(+-255 words, not bytes).
Ok?
Paul
2004-04-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_legitimate_index_p): Correct maverick offsets.
Index: arm.c
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.349
diff -u -p -r1.349 arm.c
--- a/arm.c 23 Apr 2004 13:51:19 -0000 1.349
+++ b/arm.c 23 Apr 2004 16:51:42 -0000
@@ -3089,17 +3081,15 @@ arm_legitimate_index_p (enum machine_mod
HOST_WIDE_INT range;
enum rtx_code code = GET_CODE (index);
- if (TARGET_HARD_FLOAT && TARGET_FPA && GET_MODE_CLASS (mode) == MODE_FLOAT)
+ /* Standard coprocessor addressing modes. */
+ if (TARGET_HARD_FLOAT
+ && (TARGET_FPA || TARGET_MAVERICK)
+ && (GET_MODE_CLASS (mode) == MODE_FLOAT
+ || (TARGET_MAVERICK && mode == DImode)))
return (code == CONST_INT && INTVAL (index) < 1024
&& INTVAL (index) > -1024
&& (INTVAL (index) & 3) == 0);
- if (TARGET_HARD_FLOAT && TARGET_MAVERICK
- && (GET_MODE_CLASS (mode) == MODE_FLOAT || mode == DImode))
- return (code == CONST_INT
- && INTVAL (index) < 255
- && INTVAL (index) > -255);
-
if (arm_address_register_rtx_p (index, strict_p)
&& GET_MODE_SIZE (mode) <= 4)
return 1;