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Re: [PATCH] Unrolling addressing optimization
- From: Revital Eres <ERES at il dot ibm dot com>
- To: Zdenek Dvorak <rakdver at atrey dot karlin dot mff dot cuni dot cz>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Sun, 11 Apr 2004 11:31:26 +0300
- Subject: Re: [PATCH] Unrolling addressing optimization
Hello,
> CSE then optimizes this into the same code you describe below:
> while (...)
> {
> i1 = i0 + 1
> load a[i0 + 1]
> ....
> i2 = i0 + 2
> load a[i0 + 2]
> ....
> i3 = i0 + 3
> load a[i0 + 3]
> ....
> i0 = i0 + k
> load a[i0 + k]
>}
It is not what our optimization does. In some architectures
(like PowerPC), load a[i0 + k] requires two assembly instructions,
so the above transformation is not useful.
This is probably the reason for which such cse is not done on PowerPC.
Revital