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[arm] VFP unsigned float conversion
- From: Paul Brook <paul at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard Earnshaw <rearnsha at arm dot com>
- Date: Thu, 8 Apr 2004 16:04:40 +0100
- Subject: [arm] VFP unsigned float conversion
- Organization: CodeSourcery
The following patch adds patterns for vfp unsigned int <-> float conversion.
Tested with cross-sompiler to arm-none-elf
Ok?
Paul
2004-04-08 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md (fixuns_truncsfsi2, fixuns_truncdfsi2,
floatunssisf2, floatunssidf2): New patterns.
Index: config/arm/vfp.md
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/vfp.md,v
retrieving revision 1.4
diff -u -p -r1.4 vfp.md
--- a/config/arm/vfp.md 13 Mar 2004 11:19:22 -0000 1.4
+++ b/config/arm/vfp.md 8 Apr 2004 14:42:21 -0000
@@ -558,6 +558,26 @@
(set_attr "type" "farith")]
)
+
+(define_insn "fixuns_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "=w")
+ (unsigned_fix:SI (match_operand:SF 1 "s_register_operand" "w")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+ "ftouizs%?\\t%0, %1"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "farith")]
+)
+
+(define_insn "fixuns_truncdfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "=w")
+ (unsigned_fix:SI (match_operand:DF 1 "s_register_operand" "w")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+ "ftouizd%?\\t%0, %P1"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "farith")]
+)
+
+
(define_insn "*floatsisf2_vfp"
[(set (match_operand:SF 0 "s_register_operand" "=w")
(float:SF (match_operand:SI 1 "s_register_operand" "w")))]
@@ -577,6 +597,25 @@
)
+(define_insn "floatunssisf2"
+ [(set (match_operand:SF 0 "s_register_operand" "=w")
+ (unsigned_float:SF (match_operand:SI 1 "s_register_operand" "w")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+ "fuitos%?\\t%0, %1"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "farith")]
+)
+
+(define_insn "floatunssidf2"
+ [(set (match_operand:DF 0 "s_register_operand" "=w")
+ (unsigned_float:DF (match_operand:SI 1 "s_register_operand" "w")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+ "fuitod%?\\t%P0, %1"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "farith")]
+)
+
+
;; Sqrt insns.
(define_insn "*sqrtsf2_vfp"