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Re: [csl-arm, HEAD] ARM PATCH - fix QImode addressing on ARMv4 said:
> This patch fixes the way that we manage QImode indexes when compiling
> for ARM Architecture v4 or later.  In v4 we have a ldrsb instruction
> that can sign-extend a byte load (ldrb zero-extends).  Unfortunately
> the indexing capabilities of this insn are less flexible than its
> unsigned counterpart. In the past we have restricted (mostly) the
> indexing range of ldrb to that of its poorer cousin: that generates
> correct code, but at the expense of wasting instructions when the
> indexing exceeds the capabilities of ldrsb.

> The patch below addresses all this by introducing a new memory
> predicate arm_extendqisi_mem_op which can validate a ldrsb address
> index distinctly from an ldrb address index (it does so by calling
> arm_legitimate_address_p with a new argument, the 'outer' code in much
> the same way as the RTX_COST macros do.

I forgot to mention that the patch changes the memory constraint used for 
VFP memory operands from U to 'Uv'.  The constraint for an ldrsb 
instruction is 'Uq'.


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