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Re: Patch: IA64 inline integer division


Steve Ellcey <sje@cup.hp.com> writes:

> I believe I understand this idea in theory but I am having some problems
> figuring out the specifics of how I would implement this.  Could you
> expand on your idea a little?  For a start I don't understand your
> comment about only needing an exponent and a sign.  I am also trying to
> figure out what the extendhf[sdx]f2 expanders would look like.
>
> For extendsfdf2 we have:
>
> (define_insn "extendsfdf2"
>   [(set (match_operand:DF 0 "fr_register_operand" "=f")
>         (float_extend:DF (match_operand:SF 1 "fr_register_operand" "f")))]
>   ""
>   "fnorm.d %0 = %1"
>   [(set_attr "itanium_class" "fmac")])
>
>
> but for an extendhfdf2, if I want to go from a constant into a
> fr_register_operand, I need two instructions.  One to put the constant
> into a gr_register_operand and one to move the gr_register_operand into
> an fr_register_operand.  So do I have to make extendhfdf2 a
> define_expand instead of a define_insn?

I *think* what Richard is suggesting is to make HFmode be a thing that
lives in integer registers; the extendhf?f2 patterns would replace the
existing setf_exp_?f patterns.  Loading the constant should be taken
care of by expr.c.

I worry that GCC will try to do math on HFmode and horrible things
will happen.

zw


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