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Re: P6 microarch (Pentium 2/3) DFA scheduler description
- From: law at redhat dot com
- To: Steven Bosscher <stevenb at suse dot de>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Thu, 04 Mar 2004 11:53:07 -0700
- Subject: Re: P6 microarch (Pentium 2/3) DFA scheduler description
- Reply-to: law at redhat dot com
In message <firstname.lastname@example.org>, Steven Bosscher writes:
>Here's a new version of my PPro DFA scheduler description patch.
>After changing a few changes following the feedback on my posting
>of an earlier version of this patch, and after some patient testing
>to get reportable SPEC numbers, I would like to have this reviewed
>for inclusion. The numbers and the patch are attached.
>Bootstrapped and tested on i686-pc-linux-gnu. OK?
>! ;; and Xeon lines of CPUs. The DFA scheduler description in this file is
>! ;; based on information that can be found in the following two documents:
"two" -> "three"
FWIW, Anger Fog's work was one of the references I used in my attempt to
model the P6 pipeline...