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Re: Add support for pentium-m and prescott
> On Wed, 18 Feb 2004, Jim Wilson wrote:
> > Jan Hubicka wrote:
> >> * config.gcc: Add support for pentium4e/pentium-m/pentium3m/pentium4m.
> >> * i386.c (override_options): Add support for new CPUs.
> >> * i386.h (TARGET_CPU_DEFAULT_NAMES): New names.
> >> (TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_pentium4e): New constants.
> >> * invoke.texi: Extend documentation of -mtune/-march for new CPUs.
> > OK for mainline and 3.4. 3.3 is Gaby's call.
>
> I believe we should do that, to remain consistent (and to avoid that
> dozens of vendors need an extra patch for that).
Hi,
I've been asked to use code names of the cores as it is less confusing
than pentium4e, so I've commited the updated patch (attached) and if
there will be no complains I will commit it into release branches at
monday too.
Another challenge is how to distinguish 32bit opteron/nocoma optimized
GCC (currently refered as opteron-linux/nocoma-linux) and the 64bit
build (currently doable only as x86_64-linux that will produce compiler
optimizing for opteron)
Using opteron64-linux/nocoma64-linux looks like good choice if there
wasn't there wasn't athlon_64-linux doing 32bit code...
Honza
2004-02-14 Jan Hubicka <jh@suse.cz>
* config.gcc: Add support for nocoma/prescott/pentium-m/pentium3m
/pentium4m.
* i386.c (override_options): Add support for new CPUs.
* i386.h (TARGET_CPU_DEFAULT_NAMES): New names.
(TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_pentium4e): New
constants.
* invoke.texi: Extend documentation of -mtune/-march for new CPUs.
Index: config.gcc
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config.gcc,v
retrieving revision 1.434
diff -c -3 -p -r1.434 config.gcc
*** config.gcc 25 Feb 2004 19:45:08 -0000 1.434
--- config.gcc 26 Feb 2004 21:40:20 -0000
*************** if test x$with_cpu = x ; then
*** 2136,2147 ****
pentium2-*)
with_cpu=pentium2
;;
! pentium3-*)
with_cpu=pentium3
;;
! pentium4-*)
with_cpu=pentium4
;;
*)
with_cpu=pentiumpro
;;
--- 2136,2156 ----
pentium2-*)
with_cpu=pentium2
;;
! pentium3-*|pentium3m-*)
with_cpu=pentium3
;;
! pentium4-*|pentium4m-*)
with_cpu=pentium4
;;
+ prescott-*)
+ with_cpu=prescott
+ ;;
+ nocona-*)
+ with_cpu=nocona
+ ;;
+ pentium_m-*)
+ with_cpu=pentium-m
+ ;;
*)
with_cpu=pentiumpro
;;
*************** fi
*** 2323,2329 ****
| c3 | c3-2 | i686 | pentiumpro | pentium2 | pentium3 \
| pentium4 | k6 | k6-2 | k6-3 | athlon | athlon-tbird \
| athlon-4 | athlon-xp | athlon-mp | k8 | opteron \
! | athlon64 | athlon-fx)
# OK
;;
*)
--- 2332,2339 ----
| c3 | c3-2 | i686 | pentiumpro | pentium2 | pentium3 \
| pentium4 | k6 | k6-2 | k6-3 | athlon | athlon-tbird \
| athlon-4 | athlon-xp | athlon-mp | k8 | opteron \
! | athlon64 | athlon-fx | prescott | pentium-m \
! | pentium4m | pentium3m| nocona)
# OK
;;
*)
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.653
diff -c -3 -p -r1.653 i386.c
*** config/i386/i386.c 25 Feb 2004 00:45:43 -0000 1.653
--- config/i386/i386.c 26 Feb 2004 21:40:22 -0000
*************** override_options (void)
*** 1089,1097 ****
{
PTA_SSE = 1,
PTA_SSE2 = 2,
! PTA_MMX = 4,
! PTA_PREFETCH_SSE = 8,
! PTA_3DNOW = 16,
PTA_3DNOW_A = 64,
PTA_64BIT = 128
} flags;
--- 1089,1098 ----
{
PTA_SSE = 1,
PTA_SSE2 = 2,
! PTA_SSE3 = 4,
! PTA_MMX = 8,
! PTA_PREFETCH_SSE = 16,
! PTA_3DNOW = 32,
PTA_3DNOW_A = 64,
PTA_64BIT = 128
} flags;
*************** override_options (void)
*** 1111,1118 ****
{"pentiumpro", PROCESSOR_PENTIUMPRO, 0},
{"pentium2", PROCESSOR_PENTIUMPRO, PTA_MMX},
{"pentium3", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_PREFETCH_SSE},
! {"pentium4", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 |
! PTA_MMX | PTA_PREFETCH_SSE},
{"k6", PROCESSOR_K6, PTA_MMX},
{"k6-2", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
{"k6-3", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
--- 1112,1127 ----
{"pentiumpro", PROCESSOR_PENTIUMPRO, 0},
{"pentium2", PROCESSOR_PENTIUMPRO, PTA_MMX},
{"pentium3", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_PREFETCH_SSE},
! {"pentium3m", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_PREFETCH_SSE},
! {"pentium-m", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_PREFETCH_SSE | PTA_SSE2},
! {"pentium4", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2
! | PTA_MMX | PTA_PREFETCH_SSE},
! {"pentium4m", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2
! | PTA_MMX | PTA_PREFETCH_SSE},
! {"prescott", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 | PTA_SSE3
! | PTA_MMX | PTA_PREFETCH_SSE},
! {"nocona", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_64BIT
! | PTA_MMX | PTA_PREFETCH_SSE},
{"k6", PROCESSOR_K6, PTA_MMX},
{"k6-2", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
{"k6-3", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
*************** override_options (void)
*** 1234,1239 ****
--- 1243,1251 ----
if (processor_alias_table[i].flags & PTA_SSE2
&& !(target_flags_explicit & MASK_SSE2))
target_flags |= MASK_SSE2;
+ if (processor_alias_table[i].flags & PTA_SSE3
+ && !(target_flags_explicit & MASK_SSE3))
+ target_flags |= MASK_SSE3;
if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
x86_prefetch_sse = true;
if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.378
diff -c -3 -p -r1.378 i386.h
*** config/i386/i386.h 24 Feb 2004 03:27:10 -0000 1.378
--- config/i386/i386.h 26 Feb 2004 21:40:22 -0000
*************** extern int x86_prefetch_sse;
*** 691,701 ****
#define TARGET_CPU_DEFAULT_athlon 11
#define TARGET_CPU_DEFAULT_athlon_sse 12
#define TARGET_CPU_DEFAULT_k8 13
#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\
"pentiumpro", "pentium2", "pentium3", \
"pentium4", "k6", "k6-2", "k6-3",\
! "athlon", "athlon-4", "k8"}
#ifndef CC1_SPEC
#define CC1_SPEC "%(cc1_cpu) "
--- 691,705 ----
#define TARGET_CPU_DEFAULT_athlon 11
#define TARGET_CPU_DEFAULT_athlon_sse 12
#define TARGET_CPU_DEFAULT_k8 13
+ #define TARGET_CPU_DEFAULT_pentium_m 14
+ #define TARGET_CPU_DEFAULT_prescott 15
+ #define TARGET_CPU_DEFAULT_nocona 15
#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\
"pentiumpro", "pentium2", "pentium3", \
"pentium4", "k6", "k6-2", "k6-3",\
! "athlon", "athlon-4", "k8", \
! "pentium-m", "prescott", "nocona"}
#ifndef CC1_SPEC
#define CC1_SPEC "%(cc1_cpu) "
Index: doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.415
diff -c -3 -p -r1.415 invoke.texi
*** doc/invoke.texi 24 Feb 2004 20:09:16 -0000 1.415
--- doc/invoke.texi 26 Feb 2004 21:40:23 -0000
*************** Intel PentiumMMX CPU based on Pentium co
*** 8105,8115 ****
Intel PentiumPro CPU.
@item pentium2
Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
! @item pentium3
Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set
support.
! @item pentium4
Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
@item k6
AMD K6 CPU with MMX instruction set support.
@item k6-2, k6-3
--- 8105,8124 ----
Intel PentiumPro CPU.
@item pentium2
Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
! @item pentium3, pentium3m
Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set
support.
! @item pentium-m
! Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set
! support. Used by Centrino notebooks.
! @item pentium4, pentium4m
Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
+ @item prescott
+ Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction
+ set support.
+ @item nocona
+ Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
+ SSE2 and SSE3 instruction set support.
@item k6
AMD K6 CPU with MMX instruction set support.
@item k6-2, k6-3