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Re: head: MIPS: Complete the R4000 multiply/shift errataworkaround
- From: cgd at broadcom dot com
- To: macro at ds2 dot pg dot gda dot pl
- Cc: gcc-patches at gcc dot gnu dot org
- Date: 19 Feb 2004 09:57:23 -0800
- Subject: Re: head: MIPS: Complete the R4000 multiply/shift errataworkaround
- References: <Pine.LNX.4.55.0402191618200.3794@jurand.ds.pg.gda.pl><mailpost.1077209513.14018@news-sj1-1>
At Thu, 19 Feb 2004 16:51:53 +0000 (UTC), "Maciej W. Rozycki" wrote:
> Possible improvements:
>
> 1. Differentiate between R4000 and R4400 as the latter doesn't suffer from
> the problem.
>
> 2. Add an option to toggle the workaround regardless of the processor
> selected.
FWIW, from my perspective (not a maintainer 8-), I think this is not a
"possible" improvement, it's a necessary improvement.
GCC's MIPS back-end should be capable of generating 'safe' code that
runs on a given minimum ISA level, for any processor that it knows
about fixes for, e.g.
-mips3 -mfix-r4000 -mfix-sb1 -mfix-...
Whether -mfix-r4000 should be the default in a given configuration is
not something I'm qualified to speak about, but it should definitely
be a flag that can be enabled/disabled seperately from general arch =
r4000 code generation.
chris