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Re: [PATCH] Support signbit, signbitf and signbitl as GCC builtins (take2)
- From: Ulrich Weigand <weigand at i1 dot informatik dot uni-erlangen dot de>
- To: roger at eyesopen dot com
- Cc: rth at redhat dot com, gcc-patches at gcc dot gnu dot org
- Date: Thu, 5 Feb 2004 01:25:53 +0100 (CET)
- Subject: Re: [PATCH] Support signbit, signbitf and signbitl as GCC builtins (take2)
Roger Sayle wrote:
> * builtins.c (expand_builtin_signbit): New function to RTL expand
> calls to signbit, signbitf and signbitl as inline intrinsics.
This appears to be broken on s390x (64-bit big endian target). The new
builtins-32.c test case fails because it tests the high-order bit of
the *low* order SImode half of the DFmode value, instead of the high-order
bit of the high-order half.
This is caused by an -in my understanding- invalid use of gen_highpart.
That routine works correctly only if the high part will after reload
reside within one register of a multi-word value, but not if the value
will occupy the upper half of single-word value.
You generate a (subreg:SI (reg:DF ...) 0), which violates this constraint
on 64-bit big endian targets; when confronted with this subreg, reload
silently generates incorrect code.
Bye,
Ulrich
--
Dr. Ulrich Weigand
weigand@informatik.uni-erlangen.de