This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

fix powerpc64 long double ice


Telling gcc that reg1+reg2 addressing is invalid for TFmode cures
the problem of a post-reload split that wants to generate
reg1+reg2+8 when breaking a TFmode mem into two pieces.

	PR target/14010
	* config/rs6000/rs6000.c (rs6000_legitimate_address): Disallow
	indexed addressing for TFmode when TARGET_LONG_DOUBLE_128.

Bootstrapped and regression tested powerpc64-linux on the gcc-3.4
branch.  OK to apply mainline and branch?

Index: gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.576.2.5
diff -u -p -r1.576.2.5 rs6000.c
--- gcc/config/rs6000/rs6000.c	22 Jan 2004 09:14:49 -0000	1.576.2.5
+++ gcc/config/rs6000/rs6000.c	4 Feb 2004 13:36:20 -0000
@@ -3180,7 +3180,8 @@ rs6000_legitimate_address (enum machine_
   if (mode != TImode
       && ((TARGET_HARD_FLOAT && TARGET_FPRS)
 	  || TARGET_POWERPC64
-	  || (mode != DFmode && mode != TFmode))
+	  || !(mode == DFmode || mode == TFmode))
+      && !(mode == TFmode && TARGET_LONG_DOUBLE_128)
       && (TARGET_POWERPC64 || mode != DImode)
       && legitimate_indexed_address_p (x, reg_ok_strict))
     return 1;

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]