Re: Fix ICE in compiling glibc

[Andrew Pinski <pinskia at physics dot uc dot edu>]

On Dec 28, 2003, at 19:01, Jan Hubicka wrote:

> Hi,
> the following testcases cause reload failure because combine propagate 
> st(0)
> into asm input operand of statement and reload is not able to use the 
> same
> register for output operand.  For 3.3 it works because we don't 
> combine hard reg
> loads, for mainline we need hard reg to be CLASS_LIKELY_SPILLED_P, 
> that looks
> like sane to set it for FP top and FP second registers.
>
> Bootstrapped/regtested i386, OK?
> Honza

Does this fix also PR 11936 as it looks like the same problem caused by 
the same
patch:


extern double fmod (double __x, double __y);
extern __inline double fmod (double __x, double __y)
{
  register long double __value;
  __asm __volatile__
  ("1:  fprem\n\t" "fnstsw      %%ax\n\t" "sahf\n\t" "jp        1b"
    : "=t" (__value)
    : "0" (__x), "u" (__y)
    : "ax", "cc");
  return __value; }
double quux(void);
int main(int argc,char **argv)
{
    double d=fmod(quux(),quux());
    return 0;
}
double quux(void)
{
    return 1.2;
}

Thanks,
Andrew Pinski