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Re: PATCH:[darwin] fix load of a misaligned double word


	The following patch removes the alignment restriction on DFmode
and TFmode in legitimate_offset_address_p() and changes the constraint for
movdf_hardfloat64 to use 'o' offsettable memory to prevent ld/std from
being called with arbitrarily aligned displacement.

David


2003-12-26  Fariborz Jahanian <fjahanian@apple.com>
	    Geoffrey Keating <geoffk@apple.com>
	    David Edelsohn <edelsohn@gnu.org>

	* config/rs6000/rs6000.c (legitimate_offset_address_p): Do not
	restrict DFmode and TFmode to word alignment.
	* config/rs6000/rs6000.md (movdf_hardfloat64): Use 'o' constraint
	for ld/std and order before mr.

Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.563
diff -c -p -r1.563 rs6000.c
*** rs6000.c	22 Dec 2003 18:33:00 -0000	1.563
--- rs6000.c	26 Dec 2003 04:08:06 -0000
*************** legitimate_offset_address_p (enum machin
*** 2448,2454 ****
  
      case DFmode:
      case DImode:
!       if (!TARGET_POWERPC64)
  	extra = 4;
        else if (offset & 3)
  	return false;
--- 2448,2454 ----
  
      case DFmode:
      case DImode:
!       if (mode == DFmode || !TARGET_POWERPC64)
  	extra = 4;
        else if (offset & 3)
  	return false;
*************** legitimate_offset_address_p (enum machin
*** 2456,2462 ****
  
      case TFmode:
      case TImode:
!       if (!TARGET_POWERPC64)
  	extra = 12;
        else if (offset & 3)
  	return false;
--- 2456,2462 ----
  
      case TFmode:
      case TImode:
!       if (mode == TFmode || !TARGET_POWERPC64)
  	extra = 12;
        else if (offset & 3)
  	return false;
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.277
diff -c -p -r1.277 rs6000.md
*** rs6000.md	23 Dec 2003 08:12:41 -0000	1.277
--- rs6000.md	26 Dec 2003 04:08:07 -0000
***************
*** 8159,8174 ****
    [(set_attr "type" "*,load,store,*,*,*")
     (set_attr "length" "8,8,8,8,12,16")])
  
  (define_insn "*movdf_hardfloat64"
!   [(set (match_operand:DF 0 "nonimmediate_operand" "=!r,??r,m,f,f,m,!cl,!r,!r,!r,!r")
! 	(match_operand:DF 1 "input_operand" "r,m,r,f,m,f,r,h,G,H,F"))]
    "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS
     && (gpc_reg_operand (operands[0], DFmode)
         || gpc_reg_operand (operands[1], DFmode))"
    "@
-    mr %0,%1
-    ld%U1%X1 %0,%1
     std%U0%X0 %1,%0
     fmr %0,%1
     lfd%U1%X1 %0,%1
     stfd%U0%X0 %1,%0
--- 8159,8176 ----
    [(set_attr "type" "*,load,store,*,*,*")
     (set_attr "length" "8,8,8,8,12,16")])
  
+ ; ld/std require word-aligned displacements, so use offsettable constraint.
+ ; List o->r and r->o before r->r for reload.
  (define_insn "*movdf_hardfloat64"
!   [(set (match_operand:DF 0 "nonimmediate_operand" "=o,??r,!r,f,f,m,!cl,!r,!r,!r,!r")
! 	(match_operand:DF 1 "input_operand" "r,o,r,f,m,f,r,h,G,H,F"))]
    "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS
     && (gpc_reg_operand (operands[0], DFmode)
         || gpc_reg_operand (operands[1], DFmode))"
    "@
     std%U0%X0 %1,%0
+    ld%U1%X1 %0,%1
+    mr %0,%1
     fmr %0,%1
     lfd%U1%X1 %0,%1
     stfd%U0%X0 %1,%0


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