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Re: [PATCH] - Use of powerpc 64bit instructions in 32bit ABI
- From: Eric Botcazou <ebotcazou at libertysurf dot fr>
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: Fariborz Jahanian <fjahanian at apple dot com>,Richard Henderson <rth at redhat dot com>,Ulrich Weigand <Ulrich dot Weigand at de dot ibm dot com>,ian at wasabisystems dot com,davem at redhat dot com,gcc-patches at gcc dot gnu dot org
- Date: Tue, 2 Dec 2003 10:23:19 +0100
- Subject: Re: [PATCH] - Use of powerpc 64bit instructions in 32bit ABI
- References: <D99247F4-2435-11D8-9951-000393B9ED88@apple.com> <200312011931.hB1JVvT29304@makai.watson.ibm.com>
> I am testing with the following patch.
It cures the pessimization for my original testcase. However, I think this
is not enough for the following slightly tweaked case:
typedef struct { char a; } Scc1;
void checkScc1 (Scc1 x, _Complex char y)
{
if (x.a != Re(y))
abort ();
}
We start with:
(parallel:QI [
(expr_list (reg:DI %i0)
(const_int 0 [0x0]))
])
and the new transformation generates
(reg:QI 107)
so emit_group_store emits a move between the two locations, which requires 9
more insns in the 01.rtl file than the original code, because this time no
reg is spilled so a combination of ASHIFT, SUBREG, AND and OR is used. This
is fully recovered at -O2, but not at -O1.
So I'd suggest to explicitly test the pattern you want to catch, using
XVECEXP and the likes (see the transformation just above the hot spot).
--
Eric Botcazou