This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
PATCH: Add more ARM cores
- From: Mark Mitchell <mark at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sun, 19 Oct 2003 23:30:29 -0700
- Subject: PATCH: Add more ARM cores
- Reply-to: mark at codesourcery dot com
- Sent-via: gcc-patches@gcc.gnu.org
This patch adds command-line options for several ARM cores:
- ARM926EJ-S
- ARM1026EJ-S
- ARM1136EJ-S
- ARM1136EJF-S
The latter two cores are ARM V6 cores, so this patch also adds support
for the V6 architecture.
For now, the compiler is unable to make any use of the V6
functionality, or take advantage of any of the special characteristics
of any of the cores, but this patch gives us the architecture from
which to work.
The next patch will deal with CPP builtin macros for the V6
architecture.
Tested by running through the options in a cross compiler, applied on
the mainline.
--
Mark Mitchell
CodeSourcery, LLC
mark@codesourcery.com
2003-10-19 Mark Mitchell <mark@codesourcery.com>
* config.gcc: Add support for arm926ejs, arm1026ejs, arm1136js,
arm1136jfs, and armv6j.
* config/arm/arm.c (FL_ARCH6J): New macro.
(FL_VFPV2): Likewise.
(all_cores): Add entries for arm926ejs, arm1026ejs, arm1136js,
and arm1136jfs.
(all_architectures): Add entry for armv6j.
(arm_override_options): Add entries for arm926ejs, arm1026ejs,
arm1136js, and arm1136jfs.
* config/arm/arm.h (TARGET_CPU_arm926ej_s): New macro.
(TARGET_CPU_arm1026ej_s): Likewise.
(TARGET_CPU_arm1136j_s): Likewise.
(TARGET_CPU_arm1136jf_s): Likewise.
* doc/invoke.texi: Document new ARM cores and architecture
variants.
Index: config.gcc
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config.gcc,v
retrieving revision 1.402
diff -c -5 -p -r1.402 config.gcc
*** config.gcc 17 Oct 2003 11:44:30 -0000 1.402
--- config.gcc 20 Oct 2003 05:31:29 -0000
*************** fi
*** 2328,2340 ****
| arm[236789] | arm250 | arm[67][01]0 \
| arm60 | arm620 | arm7d | arm7di \
| arm7m | arm7dm | arm7dmi | arm[79]tdmi \
| arm70 | arm700i | arm710t | arm720 \
| arm720t | arm740t | arm710c | arm920 \
! | arm920t | arm940t | arm9e | arm10tdmi \
| arm7100 | arm7500 | arm7500fe | arm810 \
! | arm1020t \
| xscale | iwmmxt \
| ep9312 \
| strongarm | strongarm110 | strongarm11[01]0)
# OK
;;
--- 2328,2340 ----
| arm[236789] | arm250 | arm[67][01]0 \
| arm60 | arm620 | arm7d | arm7di \
| arm7m | arm7dm | arm7dmi | arm[79]tdmi \
| arm70 | arm700i | arm710t | arm720 \
| arm720t | arm740t | arm710c | arm920 \
! | arm920t | arm926ejs | arm940t | arm9e | arm10tdmi \
| arm7100 | arm7500 | arm7500fe | arm810 \
! | arm1026ejs | arm1020t | arm1136js | arm1136jfs \
| xscale | iwmmxt \
| ep9312 \
| strongarm | strongarm110 | strongarm11[01]0)
# OK
;;
*************** fi
*** 2346,2356 ****
done
case "$with_arch" in
"" \
| armv[2345] | armv2a | armv3m | armv4t | armv5t \
! | armv5te | ep9312)
# OK
;;
*)
echo "Unknown arch used in --with-arch=$with_arch" 1>&2
exit 1
--- 2346,2356 ----
done
case "$with_arch" in
"" \
| armv[2345] | armv2a | armv3m | armv4t | armv5t \
! | armv5te | armv6j | ep9312)
# OK
;;
*)
echo "Unknown arch used in --with-arch=$with_arch" 1>&2
exit 1
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.298
diff -c -5 -p -r1.298 arm.c
*** config/arm/arm.c 17 Oct 2003 14:45:47 -0000 1.298
--- config/arm/arm.c 20 Oct 2003 05:31:54 -0000
*************** int arm_structure_size_boundary = DEF
*** 279,288 ****
--- 279,291 ----
#define FL_STRONG (1 << 8) /* StrongARM */
#define FL_ARCH5E (1 << 9) /* DSP extensions to v5 */
#define FL_XSCALE (1 << 10) /* XScale */
#define FL_CIRRUS (1 << 11) /* Cirrus/DSP. */
#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
+ #define FL_ARCH6J (1 << 12) /* Architecture rel 6. Adds
+ media instructions. */
+ #define FL_VFPV2 (1 << 13) /* Vector Floating Point V2. */
/* The bits in this mask specify which
instructions we are allowed to generate. */
static unsigned long insn_flags = 0;
*************** static const struct processors all_cores
*** 404,413 ****
--- 407,417 ----
{"arm710c", FL_MODE26 | FL_MODE32 },
{"arm7100", FL_MODE26 | FL_MODE32 },
{"arm7500", FL_MODE26 | FL_MODE32 },
/* Doesn't have an external co-proc, but does have embedded fpa. */
{"arm7500fe", FL_CO_PROC | FL_MODE26 | FL_MODE32 },
+ /* V4 Architecture Processors */
{"arm7tdmi", FL_CO_PROC | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
{"arm710t", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
{"arm720t", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
{"arm740t", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
{"arm8", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED },
*************** static const struct processors all_cores
*** 421,435 ****
{"ep9312", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_CIRRUS },
{"strongarm", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"strongarm110", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"strongarm1100", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"strongarm1110", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"arm10tdmi", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_ARCH5 },
{"arm1020t", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_ARCH5 },
{"xscale", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE },
{"iwmmxt", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE | FL_IWMMXT },
!
{NULL, 0}
};
static const struct processors all_architectures[] =
{
--- 425,444 ----
{"ep9312", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_CIRRUS },
{"strongarm", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"strongarm110", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"strongarm1100", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
{"strongarm1110", FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_STRONG },
+ /* V5 Architecture Processors */
{"arm10tdmi", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_ARCH5 },
{"arm1020t", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_ARCH5 },
+ {"arm926ejs", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 | FL_ARCH5E },
+ {"arm1026ejs", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 | FL_ARCH5E },
{"xscale", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE },
{"iwmmxt", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE | FL_IWMMXT },
! /* V6 Architecture Processors */
! {"arm1136js", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 | FL_ARCH5E | FL_ARCH6J },
! {"arm1136jfs", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 | FL_ARCH5E | FL_ARCH6J | FL_VFPV2 },
{NULL, 0}
};
static const struct processors all_architectures[] =
{
*************** static const struct processors all_archi
*** 444,453 ****
--- 453,463 ----
implementations that support it, so we will leave it out for now. */
{ "armv4t", FL_CO_PROC | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
{ "armv5", FL_CO_PROC | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 },
{ "armv5t", FL_CO_PROC | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 },
{ "armv5te", FL_CO_PROC | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 | FL_ARCH5E },
+ { "armv6j", FL_CO_PROC | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_ARCH5 | FL_ARCH5E | FL_ARCH6J },
{ "ep9312", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_LDSCHED | FL_CIRRUS },
{"iwmmxt", FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE | FL_IWMMXT },
{ NULL, 0 }
};
*************** arm_override_options (void)
*** 544,553 ****
--- 554,567 ----
{ TARGET_CPU_arm9, "arm9" },
{ TARGET_CPU_strongarm, "strongarm" },
{ TARGET_CPU_xscale, "xscale" },
{ TARGET_CPU_ep9312, "ep9312" },
{ TARGET_CPU_iwmmxt, "iwmmxt" },
+ { TARGET_CPU_arm926ej_s, "arm926ej-s" },
+ { TARGET_CPU_arm1026ej_s, "arm1026ej-s" },
+ { TARGET_CPU_arm1136j_s, "arm1136j_s" },
+ { TARGET_CPU_arm1136jf_s, "arm1136jf_s" },
{ TARGET_CPU_generic, "arm" },
{ 0, 0 }
};
const struct cpu_default * def;
Index: config/arm/arm.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.207
diff -c -5 -p -r1.207 arm.h
*** config/arm/arm.h 17 Oct 2003 10:58:16 -0000 1.207
--- config/arm/arm.h 20 Oct 2003 05:31:55 -0000
***************
*** 96,105 ****
--- 96,109 ----
#define TARGET_CPU_arm9 0x0080
#define TARGET_CPU_arm9tdmi 0x0080
#define TARGET_CPU_xscale 0x0100
#define TARGET_CPU_ep9312 0x0200
#define TARGET_CPU_iwmmxt 0x0400
+ #define TARGET_CPU_arm926ej_s 0x0800
+ #define TARGET_CPU_arm1026ej_s 0x1000
+ #define TARGET_CPU_arm1136j_s 0x2000
+ #define TARGET_CPU_arm1136jf_s 0x4000
/* Configure didn't specify. */
#define TARGET_CPU_generic 0x8000
typedef enum arm_cond_code
{
Index: doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.348
diff -c -5 -p -r1.348 invoke.texi
*** doc/invoke.texi 17 Oct 2003 18:24:41 -0000 1.348
--- doc/invoke.texi 20 Oct 2003 05:32:07 -0000
*************** assembly code. Permissible names are: @
*** 6629,6640 ****
@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm8},
@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
! @samp{arm920t}, @samp{arm940t}, @samp{arm9tdmi}, @samp{arm10tdmi},
! @samp{arm1020t}, @samp{xscale}, @samp{iwmmxt}, @samp{ep9312}.
@itemx -mtune=@var{name}
@opindex mtune
This option is very similar to the @option{-mcpu=} option, except that
instead of specifying the actual target processor type, and hence
--- 6629,6642 ----
@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm8},
@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
! @samp{arm920t}, @samp{arm926ejs}, @samp{arm940t}, @samp{arm9tdmi},
! @samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ejs},
! @samp{arm1136js}, @samp{arm1136jfs} ,@samp{xscale}, @samp{iwmmxt},
! @samp{ep9312}.
@itemx -mtune=@var{name}
@opindex mtune
This option is very similar to the @option{-mcpu=} option, except that
instead of specifying the actual target processor type, and hence
*************** this option.
*** 6650,6660 ****
This specifies the name of the target ARM architecture. GCC uses this
name to determine what kind of instructions it can emit when generating
assembly code. This option can be used in conjunction with or instead
of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
! @samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{iwmmxt}, @samp{ep9312}.
@item -mfpe=@var{number}
@itemx -mfp=@var{number}
@opindex mfpe
@opindex mfp
--- 6652,6663 ----
This specifies the name of the target ARM architecture. GCC uses this
name to determine what kind of instructions it can emit when generating
assembly code. This option can be used in conjunction with or instead
of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
! @samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6j},
! @samp{iwmmxt}, @samp{ep9312}.
@item -mfpe=@var{number}
@itemx -mfp=@var{number}
@opindex mfpe
@opindex mfp