This is the mail archive of the
mailing list for the GCC project.
Re: [PATCH] - Use of powerpc 64bit instructions in 32bit ABI
- From: Richard Henderson <rth at redhat dot com>
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: "David S. Miller" <davem at redhat dot com>, Fariborz Jahanian <fjahanian at apple dot com>, gcc-patches at gcc dot gnu dot org
- Date: Wed, 15 Oct 2003 13:36:53 -0700
- Subject: Re: [PATCH] - Use of powerpc 64bit instructions in 32bit ABI
- References: <email@example.com> <848BBAF9-FF33-11D7-96DA-000393B9ED88@apple.com> <200310151834.h9FIYog34384@makai.watson.ibm.com>
On Wed, Oct 15, 2003 at 02:34:50PM -0400, David Edelsohn wrote:
> What is the specific SPARC option to which you are referring?
This is more complicated on Sparc than it would be for PowerPC, because
only the %gN and %oN registers can be used for 64-bit data. The %iN and
%lN registers are not preserved as 64-bit across interrupts. This is a
side effect of the register windows and where the backing store for them
is allocated -- there is no more room without changing the ABI.