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Fix PR target/12598: Perils of gen_rtx_MEM. (Use replace_equiv_address et al!)
- From: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: mark at codesourcery dot com
- Date: Wed, 15 Oct 2003 16:18:23 +0200
- Subject: Fix PR target/12598: Perils of gen_rtx_MEM. (Use replace_equiv_address et al!)
A splitter scrubbed off the volatile flag. I see some targets
use MEM_COPY_ATTRIBUTES, but that apparently doesn't propagate
aliasing info. Target maintainers are advised to take warning.
Bah, again I noticed the maintenance-related need (see the
changelog entry) for names on the currently nameless
define_split and other define_*. On the proverbial TODO list..
I use gcc.dg/torture as the test framework, since it loops over
options, and has a target somewhat similar in nature,
mips-sdata-1.c.
I'd like this on the 3.3 branch too, once it opens again (if not
before. :-) It is not a regression, however. It was noticed
in a Linux driver. Mark, may I apply this to 3.3? Can I also
import gcc.dg/torture/dg-torture.exp on the 3.3 branch?
Committed on main trunk, no regressions on cris-elf or
cris-linux, fixes the test-case.
gcc:
PR target/12598
* config/cris/cris.md (define_split "*mov_sidesi_biap_mem"+1)
(define_splits "*mov_sidesi_mem"+1, "casesi"+9, +10, +11, +12):
Use cris_mem_op and replace_equiv_address, not gen_rtx_MEM.
("call", "call_value", define_split "*mov_sidesi_mem"+19, +20)
(define_split "*mov_sidesi_mem"+21, +22, +23, +24, +25, +26, +27)
(define_split "*mov_sidesi_mem"+28, +29, +30): Use
replace_equiv_address, not gen_rtx_MEM.
* config/cris/cris.c (cris_mem_op): New match_operator function.
(cris_notice_update_cc): Use replace_equiv_address, not
gen_rtx_MEM.
* config/cris/cris.h (PREDICATE_CODES): Add cris_mem_op.
gcc/testsuite:
PR target/12598
* gcc.dg/torture/cris-volatile-1.c: New test.
Index: config/cris/cris.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.c,v
retrieving revision 1.45
diff -p -c -r1.45 cris.c
*** config/cris/cris.c 2 Oct 2003 17:22:57 -0000 1.45
--- config/cris/cris.c 15 Oct 2003 11:29:50 -0000
*************** cris_plus_or_bound_operator (rtx x, enum
*** 374,379 ****
--- 374,392 ----
(GET_MODE (x) == mode && (code == UMIN || code == PLUS));
}
+ /* Used as an operator to get a handle on a already-known-valid MEM rtx:es
+ (no need to validate the address), where some address expression parts
+ have their own match_operand. */
+
+ int
+ cris_mem_op (rtx x, enum machine_mode mode)
+ {
+ if (mode == VOIDmode)
+ mode = GET_MODE (x);
+
+ return GET_MODE (x) == mode && GET_CODE (x) == MEM;
+ }
+
/* Since with -fPIC, not all symbols are valid PIC symbols or indeed
general_operands, we have to have a predicate that matches it for the
"movsi" expander. */
*************** cris_notice_update_cc (rtx exp, rtx insn
*** 1962,1969 ****
value1=rz and value2=[rx] */
cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
cc_status.value2
! = gen_rtx_MEM (GET_MODE (XEXP (XVECEXP (exp, 0, 0), 0)),
! XEXP (XVECEXP (exp, 0, 1), 0));
cc_status.flags = 0;
/* Huh? A side-effect cannot change the destination
--- 1975,1982 ----
value1=rz and value2=[rx] */
cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
cc_status.value2
! = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
! XEXP (XVECEXP (exp, 0, 1), 0));
cc_status.flags = 0;
/* Huh? A side-effect cannot change the destination
Index: config/cris/cris.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.h,v
retrieving revision 1.57
diff -p -c -r1.57 cris.h
*** config/cris/cris.h 2 Oct 2003 00:44:20 -0000 1.57
--- config/cris/cris.h 15 Oct 2003 11:29:52 -0000
*************** call_ ## FUNC (void) \
*** 1613,1618 ****
--- 1613,1620 ----
{ZERO_EXTEND, SIGN_EXTEND}}, \
{"cris_plus_or_bound_operator", \
{PLUS, UMIN}}, \
+ {"cris_mem_op", \
+ {MEM}}, \
{"cris_bdap_operand", \
{SUBREG, REG, LABEL_REF, SYMBOL_REF, MEM, CONST_INT, \
CONST_DOUBLE, CONST, SIGN_EXTEND}}, \
Index: config/cris/cris.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.md,v
retrieving revision 1.9
diff -p -c -r1.9 cris.md
*** config/cris/cris.md 30 Jun 2003 21:11:43 -0000 1.9
--- config/cris/cris.md 15 Oct 2003 11:36:55 -0000
***************
*** 640,649 ****
(define_split
[(parallel
! [(set (mem (plus:SI
! (mult:SI (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))
! (match_operand:SI 2 "register_operand" "")))
(match_operand 3 "register_operand" ""))
(set (match_operand:SI 4 "register_operand" "")
(plus:SI (mult:SI (match_dup 0)
--- 640,651 ----
(define_split
[(parallel
! [(set (match_operator
! 6 "cris_mem_op"
! [(plus:SI
! (mult:SI (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))
! (match_operand:SI 2 "register_operand" ""))])
(match_operand 3 "register_operand" ""))
(set (match_operand:SI 4 "register_operand" "")
(plus:SI (mult:SI (match_dup 0)
***************
*** 657,667 ****
(match_dup 1))
(match_dup 4)))]
"operands[5]
! = gen_rtx_MEM (GET_MODE (operands[3]),
! gen_rtx_PLUS (SImode,
! gen_rtx_MULT (SImode,
! operands[0], operands[1]),
! operands[2]));")
;; move.s rx,[ry=rz+i]
;; FIXME: These could have anonymous mode for operand 2.
--- 659,670 ----
(match_dup 1))
(match_dup 4)))]
"operands[5]
! = replace_equiv_address (operands[6],
! gen_rtx_PLUS (SImode,
! gen_rtx_MULT (SImode,
! operands[0],
! operands[1]),
! operands[2]));")
;; move.s rx,[ry=rz+i]
;; FIXME: These could have anonymous mode for operand 2.
***************
*** 747,755 ****
(define_split
[(parallel
! [(set (mem (plus:SI
! (match_operand:SI 0 "cris_bdap_operand" "")
! (match_operand:SI 1 "cris_bdap_operand" "")))
(match_operand 2 "register_operand" ""))
(set (match_operand:SI 3 "register_operand" "")
(plus:SI (match_dup 0) (match_dup 1)))])]
--- 750,760 ----
(define_split
[(parallel
! [(set (match_operator
! 4 "cris_mem_op"
! [(plus:SI
! (match_operand:SI 0 "cris_bdap_operand" "")
! (match_operand:SI 1 "cris_bdap_operand" ""))])
(match_operand 2 "register_operand" ""))
(set (match_operand:SI 3 "register_operand" "")
(plus:SI (match_dup 0) (match_dup 1)))])]
***************
*** 757,765 ****
[(set (match_dup 4) (match_dup 2))
(set (match_dup 3) (match_dup 0))
(set (match_dup 3) (plus:SI (match_dup 3) (match_dup 1)))]
! "operands[4]
! = gen_rtx_MEM (GET_MODE (operands[2]),
! gen_rtx_PLUS (SImode, operands[0], operands[1]));")
;; Clear memory side-effect patterns. It is hard to get to the mode if
;; the MEM was anonymous, so there will be one for each mode.
--- 762,768 ----
[(set (match_dup 4) (match_dup 2))
(set (match_dup 3) (match_dup 0))
(set (match_dup 3) (plus:SI (match_dup 3) (match_dup 1)))]
! "")
;; Clear memory side-effect patterns. It is hard to get to the mode if
;; the MEM was anonymous, so there will be one for each mode.
***************
*** 3833,3839 ****
else
abort ();
! operands[0] = gen_rtx_MEM (GET_MODE (operands[0]), op0);
}
}
}")
--- 3836,3842 ----
else
abort ();
! operands[0] = replace_equiv_address (operands[0], op0);
}
}
}")
***************
*** 3898,3904 ****
else
abort ();
! operands[1] = gen_rtx_MEM (GET_MODE (operands[1]), op1);
}
}
}")
--- 3901,3907 ----
else
abort ();
! operands[1] = replace_equiv_address (operands[1], op1);
}
}
}")
***************
*** 4201,4210 ****
(define_split
[(parallel
[(set (match_operand 0 "register_operand" "")
! (mem (plus:SI
! (mult:SI (match_operand:SI 1 "register_operand" "")
! (match_operand:SI 2 "const_int_operand" ""))
! (match_operand:SI 3 "register_operand" ""))))
(set (match_operand:SI 4 "register_operand" "")
(plus:SI (mult:SI (match_dup 1)
(match_dup 2))
--- 4204,4215 ----
(define_split
[(parallel
[(set (match_operand 0 "register_operand" "")
! (match_operator
! 6 "cris_mem_op"
! [(plus:SI
! (mult:SI (match_operand:SI 1 "register_operand" "")
! (match_operand:SI 2 "const_int_operand" ""))
! (match_operand:SI 3 "register_operand" ""))]))
(set (match_operand:SI 4 "register_operand" "")
(plus:SI (mult:SI (match_dup 1)
(match_dup 2))
***************
*** 4214,4229 ****
[(set (match_dup 4) (plus:SI (mult:SI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 0) (match_dup 5))]
! "operands[5] = gen_rtx_MEM (GET_MODE (operands[0]), operands[3]);")
;; move.S1 [rx=rx+i],ry
(define_split
[(parallel
[(set (match_operand 0 "register_operand" "")
! (mem
! (plus:SI (match_operand:SI 1 "cris_bdap_operand" "")
! (match_operand:SI 2 "cris_bdap_operand" ""))))
(set (match_operand:SI 3 "register_operand" "")
(plus:SI (match_dup 1)
(match_dup 2)))])]
--- 4219,4235 ----
[(set (match_dup 4) (plus:SI (mult:SI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 0) (match_dup 5))]
! "operands[5] = replace_equiv_address (operands[6], operands[3]);")
;; move.S1 [rx=rx+i],ry
(define_split
[(parallel
[(set (match_operand 0 "register_operand" "")
! (match_operator
! 5 "cris_mem_op"
! [(plus:SI (match_operand:SI 1 "cris_bdap_operand" "")
! (match_operand:SI 2 "cris_bdap_operand" ""))]))
(set (match_operand:SI 3 "register_operand" "")
(plus:SI (match_dup 1)
(match_dup 2)))])]
***************
*** 4231,4247 ****
|| rtx_equal_p (operands[3], operands[2]))"
[(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))
(set (match_dup 0) (match_dup 4))]
! "operands[4] = gen_rtx_MEM (GET_MODE (operands[0]), operands[3]);")
;; move.S1 ry,[rx=rx+rz.S2]
(define_split
[(parallel
! [(set (mem (plus:SI
! (mult:SI (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))
! (match_operand:SI 2 "register_operand" "")))
! (match_operand 3 "register_operand" ""))
(set (match_operand:SI 4 "register_operand" "")
(plus:SI (mult:SI (match_dup 0)
(match_dup 1))
--- 4237,4255 ----
|| rtx_equal_p (operands[3], operands[2]))"
[(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))
(set (match_dup 0) (match_dup 4))]
! "operands[4] = replace_equiv_address (operands[5], operands[3]);")
;; move.S1 ry,[rx=rx+rz.S2]
(define_split
[(parallel
! [(set (match_operator
! 6 "cris_mem_op"
! [(plus:SI
! (mult:SI (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))
! (match_operand:SI 2 "register_operand" ""))])
! (match_operand 3 "register_operand" ""))
(set (match_operand:SI 4 "register_operand" "")
(plus:SI (mult:SI (match_dup 0)
(match_dup 1))
***************
*** 4251,4266 ****
[(set (match_dup 4) (plus:SI (mult:SI (match_dup 0) (match_dup 1))
(match_dup 2)))
(set (match_dup 5) (match_dup 3))]
! "operands[5] = gen_rtx_MEM (GET_MODE (operands[3]), operands[4]);")
;; move.S1 ry,[rx=rx+i]
(define_split
[(parallel
! [(set (mem
! (plus:SI (match_operand:SI 0 "cris_bdap_operand" "")
! (match_operand:SI 1 "cris_bdap_operand" "")))
! (match_operand 2 "register_operand" ""))
(set (match_operand:SI 3 "register_operand" "")
(plus:SI (match_dup 0)
(match_dup 1)))])]
--- 4259,4275 ----
[(set (match_dup 4) (plus:SI (mult:SI (match_dup 0) (match_dup 1))
(match_dup 2)))
(set (match_dup 5) (match_dup 3))]
! "operands[5] = replace_equiv_address (operands[6], operands[4]);")
;; move.S1 ry,[rx=rx+i]
(define_split
[(parallel
! [(set (match_operator
! 6 "cris_mem_op"
! [(plus:SI (match_operand:SI 0 "cris_bdap_operand" "")
! (match_operand:SI 1 "cris_bdap_operand" ""))])
! (match_operand 2 "register_operand" ""))
(set (match_operand:SI 3 "register_operand" "")
(plus:SI (match_dup 0)
(match_dup 1)))])]
***************
*** 4268,4274 ****
|| rtx_equal_p (operands[3], operands[1]))"
[(set (match_dup 3) (plus:SI (match_dup 0) (match_dup 1)))
(set (match_dup 5) (match_dup 2))]
! "operands[5] = gen_rtx_MEM (GET_MODE (operands[2]), operands[3]);")
;; clear.d [rx=rx+rz.S2]
--- 4277,4283 ----
|| rtx_equal_p (operands[3], operands[1]))"
[(set (match_dup 3) (plus:SI (match_dup 0) (match_dup 1)))
(set (match_dup 5) (match_dup 2))]
! "operands[5] = replace_equiv_address (operands[6], operands[3]);")
;; clear.d [rx=rx+rz.S2]
***************
*** 4402,4409 ****
[(set (match_dup 4) (plus:SI (mult:SI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 6)]))]
! "operands[6] = gen_rtx_MEM (GET_MODE (XEXP (operands[5],0)),
! operands[4]);")
;; mov(s|u).S1 [rx=rx+i],ry
--- 4411,4417 ----
[(set (match_dup 4) (plus:SI (mult:SI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 6)]))]
! "operands[6] = replace_equiv_address (XEXP (operands[5], 0), operands[4]);")
;; mov(s|u).S1 [rx=rx+i],ry
***************
*** 4422,4429 ****
|| rtx_equal_p (operands[2], operands[3]))"
[(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))
(set (match_dup 0) (match_op_dup 4 [(match_dup 5)]))]
! "operands[5] = gen_rtx_MEM (GET_MODE (XEXP (operands[4], 0)),
! operands[3]);")
;; op.S1 [rx=rx+i],ry
--- 4430,4436 ----
|| rtx_equal_p (operands[2], operands[3]))"
[(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))
(set (match_dup 0) (match_op_dup 4 [(match_dup 5)]))]
! "operands[5] = replace_equiv_address (XEXP (operands[4], 0), operands[3]);")
;; op.S1 [rx=rx+i],ry
***************
*** 4443,4449 ****
|| rtx_equal_p (operands[4], operands[3]))"
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 6)]))]
! "operands[6] = gen_rtx_MEM (GET_MODE (operands[0]), operands[4]);")
;; op.S1 [rx=rx+rz.S2],ry
--- 4450,4456 ----
|| rtx_equal_p (operands[4], operands[3]))"
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 6)]))]
! "operands[6] = replace_equiv_address (XEXP (operands[5], 1), operands[4]);")
;; op.S1 [rx=rx+rz.S2],ry
***************
*** 4467,4473 ****
[(set (match_dup 5) (plus:SI (mult:SI (match_dup 2) (match_dup 3))
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 1) (match_dup 7)]))]
! "operands[7] = gen_rtx_MEM (GET_MODE (operands[0]), operands[5]);")
;; op.S1 [rx=rx+rz.S2],ry (swapped)
--- 4474,4480 ----
[(set (match_dup 5) (plus:SI (mult:SI (match_dup 2) (match_dup 3))
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 1) (match_dup 7)]))]
! "operands[7] = replace_equiv_address (XEXP (operands[6], 1), operands[5]);")
;; op.S1 [rx=rx+rz.S2],ry (swapped)
***************
*** 4491,4497 ****
[(set (match_dup 5) (plus:SI (mult:SI (match_dup 2) (match_dup 3))
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 7) (match_dup 1)]))]
! "operands[7] = gen_rtx_MEM (GET_MODE (operands[0]), operands[5]);")
;; op.S1 [rx=rx+i],ry (swapped)
--- 4498,4504 ----
[(set (match_dup 5) (plus:SI (mult:SI (match_dup 2) (match_dup 3))
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 7) (match_dup 1)]))]
! "operands[7] = replace_equiv_address (XEXP (operands[6], 0), operands[5]);")
;; op.S1 [rx=rx+i],ry (swapped)
***************
*** 4511,4517 ****
|| rtx_equal_p (operands[4], operands[3]))"
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 6) (match_dup 1)]))]
! "operands[6] = gen_rtx_MEM (GET_MODE (operands[0]), operands[4]);")
;; op(s|u).S1 [rx=rx+rz.S2],ry
--- 4518,4524 ----
|| rtx_equal_p (operands[4], operands[3]))"
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 6) (match_dup 1)]))]
! "operands[6] = replace_equiv_address (XEXP (operands[5], 0), operands[4]);")
;; op(s|u).S1 [rx=rx+rz.S2],ry
***************
*** 4538,4545 ****
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 1) (match_dup 8)]))]
"operands[8] = gen_rtx (GET_CODE (operands[7]), GET_MODE (operands[7]),
! gen_rtx_MEM (GET_MODE (XEXP (operands[7], 0)),
! operands[5]));")
;; op(s|u).S1 [rx=rx+i],ry
--- 4545,4552 ----
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 1) (match_dup 8)]))]
"operands[8] = gen_rtx (GET_CODE (operands[7]), GET_MODE (operands[7]),
! replace_equiv_address (XEXP (operands[7], 0),
! operands[5]));")
;; op(s|u).S1 [rx=rx+i],ry
***************
*** 4563,4570 ****
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 7)]))]
"operands[7] = gen_rtx (GET_CODE (operands[6]), GET_MODE (operands[6]),
! gen_rtx_MEM (GET_MODE (XEXP (operands[6], 0)),
! operands[4]));")
;; op(s|u).S1 [rx=rx+rz.S2],ry (swapped, plus or bound)
--- 4570,4577 ----
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 7)]))]
"operands[7] = gen_rtx (GET_CODE (operands[6]), GET_MODE (operands[6]),
! replace_equiv_address (XEXP (operands[6], 0),
! operands[4]));")
;; op(s|u).S1 [rx=rx+rz.S2],ry (swapped, plus or bound)
***************
*** 4590,4597 ****
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 8) (match_dup 1)]))]
"operands[8] = gen_rtx (GET_CODE (operands[6]), GET_MODE (operands[6]),
! gen_rtx_MEM (GET_MODE (XEXP (operands[6], 0)),
! operands[5]));")
;; op(s|u).S1 [rx=rx+i],ry (swapped, plus or bound)
--- 4597,4604 ----
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 8) (match_dup 1)]))]
"operands[8] = gen_rtx (GET_CODE (operands[6]), GET_MODE (operands[6]),
! replace_equiv_address (XEXP (operands[6], 0),
! operands[5]));")
;; op(s|u).S1 [rx=rx+i],ry (swapped, plus or bound)
***************
*** 4614,4621 ****
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 7) (match_dup 1)]))]
"operands[7] = gen_rtx (GET_CODE (operands[5]), GET_MODE (operands[5]),
! gen_rtx_MEM (GET_MODE (XEXP (operands[5], 0)),
! operands[4]));")
;; Splits for addressing prefixes that have no side-effects, so we can
;; fill a delay slot. Never split if we lose something, though.
--- 4621,4628 ----
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 7) (match_dup 1)]))]
"operands[7] = gen_rtx (GET_CODE (operands[5]), GET_MODE (operands[5]),
! replace_equiv_address (XEXP (operands[5], 0),
! operands[4]));")
;; Splits for addressing prefixes that have no side-effects, so we can
;; fill a delay slot. Never split if we lose something, though.
***************
*** 4643,4649 ****
[(set (match_dup 2) (match_dup 4))
(set (match_dup 0) (match_dup 3))]
"operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
! operands[3] = gen_rtx_MEM (GET_MODE (operands[0]), operands[2]);
operands[4] = XEXP (operands[1], 0);")
;; As the above, but MOVS and MOVU.
--- 4650,4656 ----
[(set (match_dup 2) (match_dup 4))
(set (match_dup 0) (match_dup 3))]
"operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
! operands[3] = replace_equiv_address (operands[1], operands[2]);
operands[4] = XEXP (operands[1], 0);")
;; As the above, but MOVS and MOVU.
***************
*** 4661,4667 ****
[(set (match_dup 2) (match_dup 5))
(set (match_dup 0) (match_op_dup 4 [(match_dup 3)]))]
"operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
! operands[3] = gen_rtx_MEM (GET_MODE (XEXP (operands[4], 0)), operands[2]);
operands[5] = XEXP (operands[1], 0);")
;; Various peephole optimizations.
--- 4668,4674 ----
[(set (match_dup 2) (match_dup 5))
(set (match_dup 0) (match_op_dup 4 [(match_dup 3)]))]
"operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
! operands[3] = replace_equiv_address (XEXP (operands[4], 0), operands[2]);
operands[5] = XEXP (operands[1], 0);")
;; Various peephole optimizations.
--- /dev/null Tue Jan 1 05:00:00 1980
+++ testsuite/gcc.dg/torture/cris-volatile-1.c Mon Oct 13 15:21:37 2003
@@ -0,0 +1,72 @@
+/* Copyright (C) 2003 Free Software Foundation.
+ Check that size-optimizations for move insns (specifically peephole
+ optimizations) aren't applied to volatile objects in the CRIS port.
+ Origin: Hans-Peter Nilsson. */
+/* { dg-do compile { target cris-*-* } } */
+/* { dg-final { scan-assembler-not {movu\...\[} } } */
+/* { dg-final { scan-assembler-not {move\.[^d].\[} } } */
+/* { dg-final { scan-assembler-not {and\.[^d].\[} } } */
+/* { dg-final { scan-assembler-not {or\.[^d].\[} } } */
+
+static const unsigned long c = 0x0000FF00;
+unsigned long
+a1 (void)
+{
+ unsigned long m;
+ m = *(volatile unsigned long*) 0xb00000c8;
+ m &= c;
+ return m;
+}
+extern volatile unsigned long xx;
+unsigned long
+a2 (void)
+{
+ unsigned long m;
+ m = xx;
+ m &= c;
+ return m;
+}
+extern volatile unsigned long yy[];
+unsigned long
+a3 (void)
+{
+ unsigned long m;
+ m = yy[3];
+ m &= 0xfe00;
+ return m;
+}
+unsigned long
+ac1 (void)
+{
+ unsigned long m;
+ m = *(volatile unsigned long*) 0xb00000c8;
+ m &= 0xfe00;
+ return m;
+}
+extern volatile unsigned long xx;
+unsigned long
+ac2 (void)
+{
+ unsigned long m;
+ m = xx;
+ m &= 0xfe00;
+ return m;
+}
+extern volatile unsigned long yy[];
+unsigned long
+ac3 (void)
+{
+ unsigned long m;
+ m = yy[3];
+ m &= 0xfe00;
+ return m;
+}
+extern volatile unsigned long yy[];
+unsigned long
+oc3 (void)
+{
+ unsigned long m;
+ m = yy[3];
+ m |= ~0xf;
+ return m;
+}
brgds, H-P