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Target-dependent modes (2/3) take one


I fully anticipate having to revise this patch before it can actually
go in, but I wanted to give y'all a taste of things to come.  This bit
moves all the modes that are only used by particular targets out of
machmode.def to the relevant ARCH-modes.def.  As you can see, it's
small and mostly mechanical, albeit there are some weird bits.

I could not find any setting of the floating point format for XFmode
for ARM, nor HFmode for DSP16xx.  This is broken.  It looks like
these really are used, so I defined them with no format -- port
maintainers should correct this.

Also, several ports had passing mention of XF or TFmode without
actually defining any insns or library functions to use them;
in these cases I have just ripped out the mentions.  (Note C99 says
long double can be the same as double.)

The change to c4x_immed_int_constant was a preexisting bug being
hidden by the casts that have now been removed from GET_MODE_CLASS.
It would have caused a memory read at a random address, but near a
valid pointer, so it's not that surprising that no one noticed.

rs6000 uses PSImode to represent the XER register.  The XER register
appears never to be used for anything.  I would like to rip it out
entirely, but I'm not sure it's safe to change register numbers like
that, and I am also not familiar with the history; maybe it's needed
for something I did not understand.

This was generated by interdiff.  Patch 1.5 in this series is
required.

I am going to run a whole bunch of simulator tests overnight.

zw

        * genmodes.c (RESET_FLOAT_FORMAT, reset_float_format): New.
        * machmode.def: Explain ARCH-modes.def.  Document
        RESET_FLOAT_FORMAT.  Improve commentary on various mode
        clusters.  Do not define OI, PQI, PHI, PSI, PDI, QF, HF, TQF,
        XF, or TF modes here.  Remove backward-compatibility
        definition of CC.

        * config/alpha/alpha-modes.def: New file; define TF mode.
        * config/arc/arm-modes.def: Define XF mode.
        * config/c4x/c4x-modes.def: Define QF and HF modes.  Unset
        float format for SF and DF modes.
        * config/dsp16xx/dsp16xx-modes.def: New file; define HF mode.
        * config/i386/i386-modes.def: Define XF and TF modes.
        * config/i960/i960-modes.def: Define TF mode.
        * config/ia64/ia64-modes.def: Define TF and OI modes.
        * config/m68k/m68k-modes.def: New file; define XF mode.
        * config/mips/mips-modes.def: New file; define TF mode, reset
        formats for SF and DF modes.
        * config/pa/pa-modes.def: Define TF mode.
        * config/rs6000/rs6000.c: Define TF and PSI modes.
        * config/s390/s390-modes.def: Define OI mode.
        * config/sh/sh-modes.def: New file; define PSI mode.
        * config/sparc/sparc-modes.def: Define TF mode.
        * config/vax/vax-modes.def: New file; reset formats for SF and
        DF modes.

        * config/c4x/c4x.c (c4x_override_options): No need to mess
        with real_format_for_mode or set REAL_MODE_FORMATs.
        (c4x_immed_int_constant): Don't apply GET_MODE_CLASS to rtx
        variable.
        * config/i386/i386.c (override_options): No need to set
        REAL_MODE_FORMATs here.
        * config/i960/i960.c (i960_initialize): Likewise.
        * config/m68k/m68k.c (m68k_override_options): Likewise.
        * config/ia64/ia64.c (ia64_override_options): Set REAL_MODE_FORMAT
        for TFmode only if not the default.
        * config/mips/mips.c (override_options): Likewise.
        * config/vax/vax.c (override_optionms): Set REAL_MODE_FORMAT for
        DFmode only if not the default.

        * config/i370/i370.h (RET_REG): Don't consider TFmode.
        * config/m68hc11/m68hc11.c (print_operand): Don't consider XFmode.
        * config/dsp16xx/dsp16xx.c (hard_regno_mode_ok): #if 0 out use
        of modes that don't appear anywhere in the machine description.

        * config/arc/arc-modes.def, config/arm/arm-modes.def
        * config/c4x/c4x-modes.def, config/frv/frv-modes.def
        * config/i386/i386-modes.def, config/i960/i960-modes.def
        * config/ia64/ia64-modes.def, config/mmix/mmix-modes.def
        * config/pa/pa-modes.def, config/pdp11/pdp11-modes.def
        * config/rs6000/rs6000-modes.def, config/s390/s390-modes.def
        * config/sparc/sparc-modes.def: Convert to new style for
        declaring extra CC modes.

===================================================================
Index: genmodes.c
--- genmodes.c	11 Oct 2003 08:53:37 -0000
+++ genmodes.c	11 Oct 2003 08:12:25 -0000
@@ -449,2 +449,17 @@
 
+#define RESET_FLOAT_FORMAT(N, F) \
+  reset_float_format (#N, #F, __FILE__, __LINE__)
+static void ATTRIBUTE_UNUSED
+reset_float_format (const char *name, const char *format,
+		    const char *file, const char *line)
+{
+  struct mode_data *m = find_mode (MODE_FLOAT, name);
+  if (!m)
+    {
+      error ("%s:%d: no mode \"%s\" in class FLOAT", file, line, name);
+      return;
+    }
+  m->format = format;
+}
+
 /* Partial integer modes are specified by relation to a full integer mode.
===================================================================
Index: machmode.def
--- machmode.def	11 Oct 2003 08:53:37 -0000
+++ machmode.def	11 Oct 2003 08:12:25 -0000
@@ -53,6 +53,10 @@
    A FORMAT argument must be one of the real_mode_format structures
    declared in real.h, or else a literal 0.
 
+   This file defines only those modes which are of use on almost all
+   machines.  Other modes can be defined in the target-specific
+   mode definition file, config/ARCH/ARCH-modes.def.
+
    Order matters in this file in so far as statements which refer to
    other modes must appear after the modes they refer to.  However,
    statements which do not refer to other modes may appear in any
@@ -83,4 +87,9 @@
 	floating point format FORMAT.
 
+     RESET_FLOAT_FORMAT (MODE, FORMAT);
+	changes the format of MODE, which must be class FLOAT,
+	to FORMAT.  Use in an ARCH-modes.def to reset the format
+	of one of the float modes defined in this file.
+
      PARTIAL_INT_MODE (MODE);
         declares a mode of class PARTIAL_INT with the same size as
@@ -126,46 +135,34 @@
 /* Single bit mode used for booleans.  */
 FRACTIONAL_INT_MODE (BI, 1, 1);
 
-/* Basic integer modes.  */
+/* Basic integer modes.  We go up to TI in generic code (128 bits).
+   The name OI is reserved for a 256-bit type (needed by some back ends).
+   FIXME TI shouldn't be generically available either.  */
 INT_MODE (QI, 1);
 INT_MODE (HI, 2);
 INT_MODE (SI, 4);
 INT_MODE (DI, 8);
 INT_MODE (TI, 16);
-INT_MODE (OI, 32);
 
-/* Pointers on some machines use these types to distinguish them from
-   ints.  Useful if a pointer is 4 bytes but has some bits that are
-   not significant, so it is really not quite as wide as an integer.  */
-PARTIAL_INT_MODE (QI);
-PARTIAL_INT_MODE (HI);
-PARTIAL_INT_MODE (SI);
-PARTIAL_INT_MODE (DI);
-
-/* Basic floating point modes.
-
-   These are the IEEE mappings.  They can be overridden at runtime
-   (in OVERRIDE_OPTIONS).  */
-
-FLOAT_MODE (QF,  1, 0);
-FLOAT_MODE (HF,  2, 0);
-FLOAT_MODE (TQF, 3, 0);	/* MIL-STD-1750a */
-FLOAT_MODE (SF,  4, ieee_single_format);
-FLOAT_MODE (DF,  8, ieee_double_format);
-FLOAT_MODE (XF, 12, 0);  /* would be ieee_extended_format, but
-			    there are several possibilities of
-			    roughly equal commonness; choose one in
-			    OVERRIDE_OPTIONS.  */
-FLOAT_MODE (TF, 16, ieee_quad_format);
+/* No partial integer modes are defined by default.  */
+
+/* Basic floating point modes.  SF and DF are the only modes provided
+   by default.  The names QF, HF, XF, and TF are reserved for targets
+   that need 1-word, 2-word, 80-bit, or 128-bit float types respectively.
 
-/* Basic CC modes.  */
+   These are the IEEE mappings.  They can be overridden with
+   RESET_FLOAT_FORMAT or at runtime (in OVERRIDE_OPTIONS).  */
+
+FLOAT_MODE (SF, 4, ieee_single_format);
+FLOAT_MODE (DF, 8, ieee_double_format);
+
+/* Basic CC modes.
+   FIXME define this only for targets that need it.  */
 CC_MODE (CC);
 
 /* Allow the target to specify additional modes of various kinds.  */
 #if HAVE_EXTRA_MODES
-# define CC(X) CC_MODE(X);  /* backward compatibility, temporary */
 # include EXTRA_MODES_FILE
-# undef CC
 #endif
 
 /* Complex modes.  */
@@ -184,7 +181,12 @@
 VECTOR_MODE (INT, DI, 4);
 VECTOR_MODE (INT, DI, 8);
 
-VECTOR_MODE (INT, DI, 1);  /* PPC uses this.  Why not plain DI? */
+/* PPC uses this to distinguish between DImode passed in
+   float registers and DImode passed in vector registers.
+   It would be in rs6000-modes.def but it's referenced in
+   c-common.c.  FIXME.  */
+
+VECTOR_MODE (INT, DI, 1);
 
 VECTOR_MODES (FLOAT, 4);      /*                 V2HF */
 VECTOR_MODES (FLOAT, 8);      /*            V4HF V2SF */
===================================================================
Index: config/alpha/alpha-modes.def
--- config/alpha/alpha-modes.def	1 Jan 1970 00:00:00 -0000
+++ config/alpha/alpha-modes.def	11 Oct 2003 08:12:25 -0000
@@ -0,0 +1,23 @@
+/* Alpha extra machine modes. 
+   Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* 128-bit floating point.  This gets reset in alpha_override_options
+   if VAX float format is in use. */
+FLOAT_MODE (TF, 16, ieee_quad_format);
===================================================================
Index: config/arc/arc-modes.def
--- config/arc/arc-modes.def	27 Sep 2003 04:48:13 -0000	1.2
+++ config/arc/arc-modes.def	11 Oct 2003 08:12:25 -0000
@@ -21,5 +21,5 @@ Boston, MA 02111-1307, USA.  */
 /* Some insns set all condition code flags, some only set the ZNC flags, and
    some only set the ZN flags.  */
 
-CC (CCZNC)
-CC (CCZN)
+CC_MODE (CCZNC);
+CC_MODE (CCZN);
===================================================================
Index: config/arm/arm-modes.def
--- config/arm/arm-modes.def	10 Feb 2003 16:33:08 -0000	1.2
+++ config/arm/arm-modes.def	11 Oct 2003 08:12:26 -0000
@@ -22,25 +22,29 @@
    the Free Software Foundation, 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
+/* Extended precision floating point.
+   FIXME What format is this?  */
+FLOAT_MODE (XF, 12, 0);
+
 /* CCFPEmode should be used with floating inequalities,
    CCFPmode should be used with floating equalities.
    CC_NOOVmode should be used with SImode integer equalities.
    CC_Zmode should be used if only the Z flag is set correctly
    CCmode should be used otherwise. */
 
-CC (CC_NOOV)
-CC (CC_Z)
-CC (CC_SWP)
-CC (CCFP)
-CC (CCFPE)
-CC (CC_DNE)
-CC (CC_DEQ)
-CC (CC_DLE)
-CC (CC_DLT)
-CC (CC_DGE)
-CC (CC_DGT)
-CC (CC_DLEU)
-CC (CC_DLTU)
-CC (CC_DGEU)
-CC (CC_DGTU)
-CC (CC_C)
+CC_MODE (CC_NOOV);
+CC_MODE (CC_Z);
+CC_MODE (CC_SWP);
+CC_MODE (CCFP);
+CC_MODE (CCFPE);
+CC_MODE (CC_DNE);
+CC_MODE (CC_DEQ);
+CC_MODE (CC_DLE);
+CC_MODE (CC_DLT);
+CC_MODE (CC_DGE);
+CC_MODE (CC_DGT);
+CC_MODE (CC_DLEU);
+CC_MODE (CC_DLTU);
+CC_MODE (CC_DGEU);
+CC_MODE (CC_DGTU);
+CC_MODE (CC_C);
===================================================================
Index: config/c4x/c4x-modes.def
--- config/c4x/c4x-modes.def	28 Jun 2003 19:43:01 -0000	1.3
+++ config/c4x/c4x-modes.def	11 Oct 2003 08:12:26 -0000
@@ -21,6 +21,14 @@
    the Free Software Foundation, 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
+/* C4x wants 1- and 2-word float modes, in its own peculiar format.
+   FIXME: Give this port a way to get rid of SFmode, DFmode, and all
+   the other modes it doesn't use.  */
+FLOAT_MODE (QF, 1, c4x_single_format);
+FLOAT_MODE (HF, 2, c4x_extended_format);
+RESET_FLOAT_FORMAT (SF, 0);  /* not used */
+RESET_FLOAT_FORMAT (DF, 0);  /* not used */
+
 /* Add any extra modes needed to represent the condition code.
 
    On the C4x, we have a "no-overflow" mode which is used when an ADD,
@@ -98,5 +106,4 @@
    load instructions after an add, subtract, neg, abs or multiply.
    We must emit a compare insn to check the result against 0.  */
 
-CC (CC_NOOV)
-
+CC_MODE (CC_NOOV);
===================================================================
Index: config/c4x/c4x.c
--- config/c4x/c4x.c	6 Oct 2003 22:47:26 -0000	1.133
+++ config/c4x/c4x.c	11 Oct 2003 08:12:26 -0000
@@ -314,11 +314,6 @@ c4x_override_options (void)
      This provides compatibility with the old -mno-aliases option.  */
   if (! TARGET_ALIASES && ! flag_argument_noalias)
     flag_argument_noalias = 1;
-
-  /* We're C4X floating point, not IEEE floating point.  */
-  memset (real_format_for_mode, 0, sizeof real_format_for_mode);
-  REAL_MODE_FORMAT (QFmode) = &c4x_single_format;
-  REAL_MODE_FORMAT (HFmode) = &c4x_extended_format;
 }
 
 
@@ -2464,8 +2459,8 @@ c4x_immed_int_constant (rtx op)
     return 0;
 
   return GET_MODE (op) == VOIDmode
-    || GET_MODE_CLASS (op) == MODE_INT
-    || GET_MODE_CLASS (op) == MODE_PARTIAL_INT;
+    || GET_MODE_CLASS (GET_MODE (op)) == MODE_INT
+    || GET_MODE_CLASS (GET_MODE (op)) == MODE_PARTIAL_INT;
 }
 
 
===================================================================
Index: config/dsp16xx/dsp16xx-modes.def
--- config/dsp16xx/dsp16xx-modes.def	1 Jan 1970 00:00:00 -0000
+++ config/dsp16xx/dsp16xx-modes.def	11 Oct 2003 08:12:26 -0000
@@ -0,0 +1,23 @@
+/* DSP16xx extra modes.
+   Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* HFmode is the DSP16xx's equivalent of SFmode.
+   FIXME: What format is this anyway? */ 
+FLOAT_MODE (HF, 2, 0);
===================================================================
Index: config/dsp16xx/dsp16xx.c
--- config/dsp16xx/dsp16xx.c	19 Jun 2003 21:47:08 -0000	1.37
+++ config/dsp16xx/dsp16xx.c	11 Oct 2003 08:12:26 -0000
@@ -203,12 +203,15 @@ hard_regno_mode_ok (regno, mode)
 	 modes.  */
       
     case HFmode:
+    case HImode:
+#if 0 /* ??? These modes do not appear in the machine description nor
+         are there library routines for them.  */
     case SFmode:
     case DFmode:
     case XFmode:
-    case HImode:
     case SImode:
     case DImode:
+#endif
       if (regno == REG_A0 || regno == REG_A1 || regno == REG_Y || regno == REG_PROD
 	  || (IS_YBASE_REGISTER_WINDOW(regno) && ((regno & 1) == 0)))
 	return 1;
===================================================================
Index: config/frv/frv-modes.def
--- config/frv/frv-modes.def	27 Sep 2003 04:48:16 -0000	1.2
+++ config/frv/frv-modes.def	11 Oct 2003 08:12:26 -0000
@@ -25,6 +25,6 @@ Boston, MA 02111-1307, USA.  */
    CC_FPmode	set FCC's from comparing floating point
    CC_CCRmode	set CCR's to do conditional execution */
 
-CC (CC_UNS)
-CC (CC_FP)
-CC (CC_CCR)
+CC_MODE (CC_UNS);
+CC_MODE (CC_FP);
+CC_MODE (CC_CCR);
===================================================================
Index: config/i370/i370.h
--- config/i370/i370.h	27 Sep 2003 04:48:18 -0000	1.68
+++ config/i370/i370.h	11 Oct 2003 08:12:26 -0000
@@ -570,7 +570,8 @@ enum reg_class
  */
 
 #define RET_REG(MODE)	\
-    (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
+    (((MODE) == DCmode || (MODE) == SCmode \
+      || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
 
 #define FUNCTION_VALUE(VALTYPE, FUNC)  					\
   gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
===================================================================
Index: config/i386/i386-modes.def
--- config/i386/i386-modes.def	26 Sep 2003 03:46:05 -0000	1.3
+++ config/i386/i386-modes.def	11 Oct 2003 08:12:26 -0000
@@ -18,6 +18,12 @@ along with GCC; see the file COPYING.  I
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
+/* By default our XFmode is the 80-bit extended format.  If we use
+   TFmode instead, it's also the 80-bit format, but with padding. */
+
+FLOAT_MODE (XF, 12, ieee_extended_intel_96_format);
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
 /* Add any extra modes needed to represent the condition code.
 
    For the i386, we need separate modes when floating-point
@@ -38,9 +44,9 @@ Boston, MA 02111-1307, USA.  */
 
    Add CCZ to indicate that only the Zero flag is valid.  */
 
-CC (CCGC)
-CC (CCGOC)
-CC (CCNO)
-CC (CCZ)
-CC (CCFP)
-CC (CCFPU)
+CC_MODE (CCGC);
+CC_MODE (CCGOC);
+CC_MODE (CCNO);
+CC_MODE (CCZ);
+CC_MODE (CCFP);
+CC_MODE (CCFPU);
===================================================================
Index: config/i386/i386.c
--- config/i386/i386.c	6 Oct 2003 23:18:31 -0000	1.605
+++ config/i386/i386.c	11 Oct 2003 08:12:27 -0000
@@ -1111,13 +1111,9 @@ override_options (void)
 
   int const pta_size = ARRAY_SIZE (processor_alias_table);
 
-  /* By default our XFmode is the 80-bit extended format.  If we have
-     use TFmode instead, it's also the 80-bit format, but with padding.  */
-  REAL_MODE_FORMAT (XFmode) = &ieee_extended_intel_96_format;
-  REAL_MODE_FORMAT (TFmode) = &ieee_extended_intel_128_format;
-
-  /* Set the default values for switches whose default depends on TARGET_64BIT
-     in case they weren't overwritten by command line options.  */
+  /* Set the default values for switches whose default depends on
+     TARGET_64BIT in case they weren't overwritten by command line
+     options.  */
   if (TARGET_64BIT)
     {
       if (flag_omit_frame_pointer == 2)
===================================================================
Index: config/i960/i960-modes.def
--- config/i960/i960-modes.def	27 Sep 2003 04:48:19 -0000	1.2
+++ config/i960/i960-modes.def	11 Oct 2003 08:12:27 -0000
@@ -21,10 +21,13 @@ along with GCC; see the file COPYING.  I
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
+/* long double */
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
 /* Add any extra modes needed to represent the condition code.
 
    Also, signed and unsigned comparisons are distinguished, as
    are operations which are compatible with chkbit insns.  */
 
-CC (CC_UNS)
-CC (CC_CHK)
+CC_MODE (CC_UNS);
+CC_MODE (CC_CHK);
===================================================================
Index: config/i960/i960.c
--- config/i960/i960.c	6 Oct 2003 22:47:28 -0000	1.57
+++ config/i960/i960.c	11 Oct 2003 08:12:27 -0000
@@ -167,9 +167,6 @@ i960_initialize ()
       i960_maxbitalignment = 128;
       i960_last_maxbitalignment = 8;
     }
-
-  /* Tell the compiler which flavor of TFmode we're using.  */
-  REAL_MODE_FORMAT (TFmode) = &ieee_extended_intel_128_format;
 }
 
 /* Return true if OP can be used as the source of an fp move insn.  */
===================================================================
Index: config/ia64/ia64-modes.def
--- config/ia64/ia64-modes.def	13 Mar 2003 18:26:29 -0000	1.2
+++ config/ia64/ia64-modes.def	11 Oct 2003 08:12:27 -0000
@@ -20,10 +20,16 @@ along with GCC; see the file COPYING.  I
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
+/* hpux will override this in ia64_override_options.  */
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
+/* 256-bit integer mode is needed for STACK_SAVEAREA_MODE.  */
+INT_MODE (OI, 32);
+
 /* Add any extra modes needed to represent the condition code.
 
    CCImode is used to mark a single predicate register instead
    of a register pair.  This is currently only used in reg_raw_mode
    so that flow doesn't do something stupid.  */
 
-CC (CCI)
+CC_MODE (CCI);
===================================================================
Index: config/ia64/ia64.c
--- config/ia64/ia64.c	10 Oct 2003 22:44:41 -0000	1.252
+++ config/ia64/ia64.c	11 Oct 2003 08:12:27 -0000
@@ -4522,8 +4522,8 @@ ia64_override_options (void)
   init_machine_status = ia64_init_machine_status;
 
   /* Tell the compiler which flavor of TFmode we're using.  */
-  if (INTEL_EXTENDED_IEEE_FORMAT)
-    REAL_MODE_FORMAT (TFmode) = &ieee_extended_intel_128_format;
+  if (!INTEL_EXTENDED_IEEE_FORMAT)
+    REAL_MODE_FORMAT (TFmode) = &ieee_quad_format;
 }
 
 static enum attr_itanium_class ia64_safe_itanium_class (rtx);
===================================================================
Index: config/m68hc11/m68hc11.c
--- config/m68hc11/m68hc11.c	2 Oct 2003 00:44:23 -0000	1.89
+++ config/m68hc11/m68hc11.c	11 Oct 2003 08:12:28 -0000
@@ -2337,8 +2337,7 @@ print_operand (file, op, letter)
       REAL_VALUE_TO_TARGET_SINGLE (r, l);
       asm_fprintf (file, "%I0x%lx", l);
     }
-  else if (GET_CODE (op) == CONST_DOUBLE
-	   && (GET_MODE (op) == DFmode || GET_MODE (op) == XFmode))
+  else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == DFmode)
     {
       char dstr[30];
 
===================================================================
Index: config/m68k/m68k-modes.def
--- config/m68k/m68k-modes.def	1 Jan 1970 00:00:00 -0000
+++ config/m68k/m68k-modes.def	11 Oct 2003 08:12:28 -0000
@@ -0,0 +1,22 @@
+/* M68k extra machine modes. 
+   Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* 80-bit floating point (IEEE extended, in a 96-bit field) */
+FLOAT_MODE (XF, 12, ieee_extended_motorola_format);
===================================================================
Index: config/m68k/m68k.c
--- config/m68k/m68k.c	11 Oct 2003 06:27:35 -0000	1.109
+++ config/m68k/m68k.c	11 Oct 2003 08:12:28 -0000
@@ -290,9 +290,6 @@ override_options (void)
     flag_no_function_cse = 1;
 
   SUBTARGET_OVERRIDE_OPTIONS;
-
-  /* Tell the compiler which flavor of XFmode we're using.  */
-  REAL_MODE_FORMAT (XFmode) = &ieee_extended_motorola_format;
 }
 
 /* Return nonzero if FUNC is an interrupt function as specified by the
===================================================================
Index: config/mips/mips-modes.def
--- config/mips/mips-modes.def	1 Jan 1970 00:00:00 -0000
+++ config/mips/mips-modes.def	11 Oct 2003 08:12:28 -0000
@@ -0,0 +1,27 @@
+/* MIPS extra machine modes. 
+   Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* MIPS has a quirky almost-IEEE format for all its
+   floating point.  */
+RESET_FLOAT_FORMAT (SF, mips_single_format);
+RESET_FLOAT_FORMAT (DF, mips_double_format);
+
+/* Irix6 will override this via MIPS_TFMODE_FORMAT.  */
+FLOAT_MODE (TF, 16, mips_quad_format);
===================================================================
Index: config/mips/mips.c
--- config/mips/mips.c	8 Oct 2003 08:27:29 -0000	1.333
+++ config/mips/mips.c	11 Oct 2003 08:12:28 -0000
@@ -4856,12 +4856,8 @@ override_options (void)
       flag_delayed_branch = 0;
     }
 
-  REAL_MODE_FORMAT (SFmode) = &mips_single_format;
-  REAL_MODE_FORMAT (DFmode) = &mips_double_format;
 #ifdef MIPS_TFMODE_FORMAT
   REAL_MODE_FORMAT (TFmode) = &MIPS_TFMODE_FORMAT;
-#else
-  REAL_MODE_FORMAT (TFmode) = &mips_quad_format;
 #endif
 
   mips_print_operand_punct['?'] = 1;
===================================================================
Index: config/mmix/mmix-modes.def
--- config/mmix/mmix-modes.def	20 Dec 2002 04:30:53 -0000	1.3
+++ config/mmix/mmix-modes.def	11 Oct 2003 08:12:28 -0000
@@ -32,19 +32,19 @@ Boston, MA 02111-1307, USA.  */
 
 /* The CC_UNS mode is for an unsigned operands integer comparison using
    the CMPU insn.  Result values correspond to those in CCmode.  */
-CC (CC_UNS)
+CC_MODE (CC_UNS);
 
 /* The CC_FP mode is for a non-equality floating-point comparison, using
    the FCMP or FCMPE insn.  The result is (integer) -1 or 1 for
    espectively a < b and a > b, otherwise 0.  */
-CC (CC_FP)
+CC_MODE (CC_FP);
 
 /* The CC_FPEQ mode is for an equality floating-point comparison, using
    the FEQL or FEQLE insn.  The result is (integer) 1 for a == b,
    otherwise 0 (including NaN:s).  */
-CC (CC_FPEQ)
+CC_MODE (CC_FPEQ);
 
 /* The CC_FUN mode is for an ordering comparison, using the FUN or FUNE
    insn.  The result is (integer) 1 if a is unordered to b, otherwise the
    result is 0.  */
-CC (CC_FUN)
+CC_MODE (CC_FUN);
===================================================================
Index: config/pa/pa-modes.def
--- config/pa/pa-modes.def	23 Aug 2003 01:32:54 -0000	1.2
+++ config/pa/pa-modes.def	11 Oct 2003 08:12:28 -0000
@@ -21,10 +21,8 @@ along with GCC; see the file COPYING.  I
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
-/* Add any extra modes needed to represent the condition code.
-
-   HPPA floating comparisons produce condition codes.  */
-
-CC (CCFP)
-
+/* TFmode: IEEE quad floating point (software).  */
+FLOAT_MODE (TF, 16, ieee_quad_format);
 
+/* HPPA floating comparisons produce distinct condition codes.  */
+CC_MODE (CCFP);
===================================================================
Index: config/pdp11/pdp11-modes.def
--- config/pdp11/pdp11-modes.def	27 Sep 2003 04:48:27 -0000	1.2
+++ config/pdp11/pdp11-modes.def	11 Oct 2003 08:12:28 -0000
@@ -22,5 +22,4 @@ Boston, MA 02111-1307, USA.  */
 /* Add any extra modes needed to represent the condition code.
    CCFPmode is used for FPU, but should we use a separate reg? */
 
-CC (CCFP)
-
+CC_MODE (CCFP);
===================================================================
Index: config/rs6000/rs6000-modes.def
--- config/rs6000/rs6000-modes.def	13 Apr 2003 17:51:07 -0000	1.2
+++ config/rs6000/rs6000-modes.def	11 Oct 2003 08:12:28 -0000
@@ -19,6 +19,15 @@
    Free Software Foundation, 59 Temple Place - Suite 330, Boston,
    MA 02111-1307, USA.  */
 
+/* 128-bit floating point.  ABI_V4 uses IEEE quad, AIX/Darwin
+   adjust this in rs6000_override_options. */
+FLOAT_MODE (TF, 16, ieee_quad_format);
+
+/* PSImode is used for the XER register.  The XER register
+   is not used for anything; perhaps it should be deleted,
+   except that that would change register numbers.  */
+PARTIAL_INT_MODE (SI);
+
 /* Add any extra modes needed to represent the condition code.
 
    For the RS/6000, we need separate modes when unsigned (logical) comparisons
@@ -26,6 +35,6 @@
    use a mode for the case when we are comparing the results of two
    comparisons, as then only the EQ bit is valid in the register.  */
 
-CC (CCUNS)
-CC (CCFP)
-CC (CCEQ)
+CC_MODE (CCUNS);
+CC_MODE (CCFP);
+CC_MODE (CCEQ);
===================================================================
Index: config/s390/s390-modes.def
--- config/s390/s390-modes.def	4 Jul 2003 22:28:58 -0000	1.4
+++ config/s390/s390-modes.def	11 Oct 2003 08:12:29 -0000
@@ -20,20 +20,23 @@ along with GCC; see the file COPYING.  I
 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 02111-1307, USA.  */
 
+/* 256-bit integer mode is needed for STACK_SAVEAREA_MODE.  */
+INT_MODE (OI, 32);
+
 /* Add any extra modes needed to represent the condition code.  */
 
-CC (CCZ)
-CC (CCA)
-CC (CCAP)
-CC (CCAN)
-CC (CCL)
-CC (CCL1)
-CC (CCL2)
-CC (CCU)
-CC (CCUR)
-CC (CCS)
-CC (CCSR)
-CC (CCT)
-CC (CCT1)
-CC (CCT2)
-CC (CCT3)
+CC_MODE (CCZ);
+CC_MODE (CCA);
+CC_MODE (CCAP);
+CC_MODE (CCAN);
+CC_MODE (CCL);
+CC_MODE (CCL1);
+CC_MODE (CCL2);
+CC_MODE (CCU);
+CC_MODE (CCUR);
+CC_MODE (CCS);
+CC_MODE (CCSR);
+CC_MODE (CCT);
+CC_MODE (CCT1);
+CC_MODE (CCT2);
+CC_MODE (CCT3);
===================================================================
Index: config/sh/sh-modes.def
--- config/sh/sh-modes.def	1 Jan 1970 00:00:00 -0000
+++ config/sh/sh-modes.def	11 Oct 2003 08:12:29 -0000
@@ -0,0 +1,23 @@
+/* Alpha extra machine modes. 
+   Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* The SH uses a partial integer mode to represent the FPSCR register.  */
+PARTIAL_INT_MODE (SI);
+
===================================================================
Index: config/sparc/sparc-modes.def
--- config/sparc/sparc-modes.def	17 Jun 2003 00:39:20 -0000	1.3
+++ config/sparc/sparc-modes.def	11 Oct 2003 08:12:29 -0000
@@ -21,6 +21,9 @@ along with GCC; see the file COPYING.  I
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
+/* 128-bit floating point */
+FLOAT_MODE (TF, 16, ieee_quad_format);
+
 /* Add any extra modes needed to represent the condition code.
 
    On the SPARC, we have a "no-overflow" mode which is used when an add or
@@ -34,9 +37,8 @@ Boston, MA 02111-1307, USA.  */
 
    CCXmode and CCX_NOOVmode are only used by v9.  */
 
-CC (CCX)
-CC (CC_NOOV)
-CC (CCX_NOOV)
-CC (CCFP)
-CC (CCFPE)
-
+CC_MODE (CCX);
+CC_MODE (CC_NOOV);
+CC_MODE (CCX_NOOV);
+CC_MODE (CCFP);
+CC_MODE (CCFPE);
===================================================================
Index: config/vax/vax-modes.def
--- config/vax/vax-modes.def	1 Jan 1970 00:00:00 -0000
+++ config/vax/vax-modes.def	11 Oct 2003 08:12:29 -0000
@@ -0,0 +1,23 @@
+/* VAX extra machine modes. 
+   Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* We just need to reset the floating point formats.  */
+RESET_FLOAT_FORMAT (SF, vax_f_format);
+RESET_FLOAT_FORMAT (DF, vax_d_format);
===================================================================
Index: config/vax/vax.c
--- config/vax/vax.c	6 Oct 2003 22:47:32 -0000	1.50
+++ config/vax/vax.c	11 Oct 2003 08:12:29 -0000
@@ -85,9 +85,8 @@ void
 override_options (void)
 {
   /* We're VAX floating point, not IEEE floating point.  */
-  memset (real_format_for_mode, 0, sizeof real_format_for_mode);
-  REAL_MODE_FORMAT (SFmode) = &vax_f_format;
-  REAL_MODE_FORMAT (DFmode) = (TARGET_G_FLOAT ? &vax_g_format : &vax_d_format);
+  if (TARGET_G_FLOAT)
+    REAL_MODE_FORMAT (DFmode) = &vax_g_format;
 }
 
 /* Generate the assembly code for function entry.  FILE is a stdio


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