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[patch] Follow spelling conventions.


Hi,

Attached is a patch to follow spelling conventions.  Committed as
obvious.

Kazu Hirata

2003-10-05  Kazu Hirata  <kazu@cs.umass.edu>

	* fold-const.c: Follow spelling conventions.
	* function.c: Likewise.
	* config/c4x/c4x.h: Likewise.
	* config/c4x/c4x.md: Likewise.
	* config/frv/frv.md: Likewise.
	* config/rs6000/aix.h: Likewise.
	* config/rs6000/linux64.h: Likewise.
	* config/xtensa/xtensa.c: Likewise.

Index: fold-const.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/fold-const.c,v
retrieving revision 1.311
diff -u -r1.311 fold-const.c
--- fold-const.c	3 Oct 2003 21:33:52 -0000	1.311
+++ fold-const.c	5 Oct 2003 13:29:16 -0000
@@ -3098,7 +3098,7 @@
 
 	      in_p = n_in_p, low = n_low, high = n_high;
 
-	      /* If the high bound is missing, but we have a non-zero low
+	      /* If the high bound is missing, but we have a nonzero low
 		 bound, reverse the range so it goes from zero to the low bound
 		 minus 1.  */
 	      if (high == 0 && low && ! integer_zerop (low))
Index: function.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/function.c,v
retrieving revision 1.458
diff -u -r1.458 function.c
--- function.c	22 Sep 2003 05:09:12 -0000	1.458
+++ function.c	5 Oct 2003 13:29:20 -0000
@@ -4530,7 +4530,7 @@
 
 		 Internally, gcc assumes that the argument pointer is
 		 aligned to STACK_BOUNDARY bits.  This is used both for
-		 alignment optimisations (see init_emit) and to locate
+		 alignment optimizations (see init_emit) and to locate
 		 arguments that are aligned to more than PARM_BOUNDARY
 		 bits.  We must preserve this invariant by rounding
 		 CURRENT_FUNCTION_PRETEND_ARGS_SIZE up to a stack
Index: config/c4x/c4x.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.h,v
retrieving revision 1.135
diff -u -r1.135 c4x.h
--- config/c4x/c4x.h	2 Oct 2003 00:44:19 -0000	1.135
+++ config/c4x/c4x.h	5 Oct 2003 13:29:22 -0000
@@ -777,7 +777,7 @@
    the register arguments (R2,R3), respectively.  I'm reluctant to define
    this macro since it stomps on many potential optimizations.  Ideally
    it should have a register class argument so that not all the register
-   classes gets penalised for the sake of a naughty few...  For long
+   classes gets penalized for the sake of a naughty few...  For long
    double arithmetic we need two additional registers that we can use as
    spill registers.  */
 
Index: config/c4x/c4x.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.md,v
retrieving revision 1.78
diff -u -r1.78 c4x.md
--- config/c4x/c4x.md	28 Jun 2003 19:43:01 -0000	1.78
+++ config/c4x/c4x.md	5 Oct 2003 13:29:24 -0000
@@ -476,7 +476,7 @@
 ;
 ; C4x FUNCTIONAL UNITS
 ;
-; Define functional units for instruction scheduling to minimise
+; Define functional units for instruction scheduling to minimize
 ; pipeline conflicts.
 ;
 ; With the C3x, an external memory write (with no wait states) takes
Index: config/frv/frv.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.md,v
retrieving revision 1.4
diff -u -r1.4 frv.md
--- config/frv/frv.md	27 Sep 2003 04:48:17 -0000	1.4
+++ config/frv/frv.md	5 Oct 2003 13:29:26 -0000
@@ -304,7 +304,7 @@
 
 ;; Instruction type
 
-;; The table below summarises the types of media instruction and their
+;; The table below summarizes the types of media instruction and their
 ;; scheduling classification.  Headings are:
 
 ;; Type:	the name of the define_attr type
Index: config/rs6000/aix.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/aix.h,v
retrieving revision 1.40
diff -u -r1.40 aix.h
--- config/rs6000/aix.h	2 Oct 2003 00:44:27 -0000	1.40
+++ config/rs6000/aix.h	5 Oct 2003 13:29:27 -0000
@@ -155,7 +155,7 @@
    layout treating the parameter area as any other block of memory,
    then map the reg param area to registers, i.e., pad upward, which
    is the way IBM Compilers for AIX behave.
-   Setting both of the following defines results in this behaviour.  */
+   Setting both of the following defines results in this behavior.  */
 #define AGGREGATE_PADDING_FIXED 1
 #define AGGREGATES_PAD_UPWARD_ALWAYS 1
 
Index: config/rs6000/linux64.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/linux64.h,v
retrieving revision 1.49
diff -u -r1.49 linux64.h
--- config/rs6000/linux64.h	16 Sep 2003 08:04:33 -0000	1.49
+++ config/rs6000/linux64.h	5 Oct 2003 13:29:27 -0000
@@ -241,7 +241,7 @@
    reasonably assume that they follow the normal rules for structure
    layout treating the parameter area as any other block of memory,
    then map the reg param area to registers.  ie. pad updard.
-   Setting both of the following defines results in this behaviour.
+   Setting both of the following defines results in this behavior.
    Setting just the first one will result in aggregates that fit in a
    doubleword being padded downward, and others being padded upward.
    Not a bad idea as this results in struct { int x; } being passed
Index: config/xtensa/xtensa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.c,v
retrieving revision 1.38
diff -u -r1.38 xtensa.c
--- config/xtensa/xtensa.c	22 Sep 2003 23:19:45 -0000	1.38
+++ config/xtensa/xtensa.c	5 Oct 2003 13:29:28 -0000
@@ -1724,7 +1724,7 @@
 
 
 /* Return an RTL expression containing the register for the given mode,
-   or 0 if the argument is to be passed on the stack.  INCOMING_P is non-zero
+   or 0 if the argument is to be passed on the stack.  INCOMING_P is nonzero
    if this is an incoming argument to the current function.  */
 
 rtx


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