Re: [patch] arch-status.html: New. (Take 4)

[Kazu Hirata <kazu at cs dot umass dot edu>]

Hi,

Here is an updated html file.  To get around the problem of the ML
misdetecting my message as a spam, I've removed all the html tags.
It's not a diff format, either.  Hopefully, ML will accept this this
time.

I've incorporated the suggestions from Gerald and Janis.

I am still wondering what the parent of this page should be.

Janis, maybe we can combine the status in simtest-howto.html and this
file by tacking on the test results for each line?  (Well, honestly, I
want to put up this file as soon as possible so that people can update
it incrementally on their own on CVS.)

Kazu Hirata

=== start ===
Status of Supported Architectures from Maintainers' Point of View

The table below contains different characteristics for all
architectures supported by GCC and is intended to alleviate the task
of maintaining the list of obsoleted targets by having various GCC
maintainers update this page themselves.  Each characteristic has a
unique letter.  In all cases, a question mark means the author didn't
know whether the architecture had the characteristic or not as of
writing.

Characteristics describing fundamental properties of the
architecture or target use CAPITAL LETTERS; characteristics describing
properties of the GCC port to that architecture or target use small
letters.

Architectures are identified by their gcc/config subdirectory,
not their CPU field in config.guess output.

Architecture characteristic key
-------------------------------
H       A hardware implementation exists.
M       A hardware implementation is currently being manufactured.
S       A Free simulator exists.
L       Integer registers are at least 32 bits wide.
Q       Integer registers are at least 64 bits wide.
N       Memory is byte addressable and bytes are eight bits.
F       Floating point arithmetic is supported
        (not necessarily by all implementations)
I       IEEE floating point is supported
        (possibly with software assistance for full conformance)
C       Architecture does not have a single condition code register.
B       Architecture does not have delay slots.
D       Architecture has a stack that grows downward.

l       Port can use ILP32 mode integer arithmetic.
q       Port can use LP64 mode integer arithmetic.
r       Port can switch between ILP32 and LP64 at runtime.
        (Not necessarily supported by all subtargets.)
c       Port does not use cc0.
p       Port does not use define_peephole.
f       Port defines prologue and/or epilogue RTL expanders.
g       Port does not define TARGET_ASM_FUNCTION_(PRO|EPI)LOGUE.
m       Port uses define_constants.
b       Port does not use '"* ..."' notation for output template code.
d       Port uses DFA scheduler descriptions.
h       Port does not contain old scheduler descriptions.
a       Port generates multiple inheritance thunks using
        TARGET_ASM_OUTPUT_MI(_VCALL)_THUNK.
t       All insns either produce exactly one assembly instruction, or
        trigger a define_split.
e       -elf is a supported target.
s       -elf is the correct target to use with the simulator
        in /cvs/src.

         | Characteristics
Target   | HMSLQNFICBD lqrcpfgmbdhates
---------+----------------------------
alpha    | H??LQNFICBD lq cpfgmbdha
arc      | ???L N    D l  cp        e
arm      | HMSL NFI BD l  c f m dha es
avr      | HMS  N   BD           h  e
c4x      | H??L  F     l  c fgm    t
cris     | HM L N I  D l         ha e
d30v     | ??SL N  CBD l  cpf       es
dsp16xx  | ???      B
fr30     | ??SL N    D l  c fg   h tes
frv      | ??SL NFI  D l  cpf m dha es
h8300    | HMSL N   BD l   pf m  h  es
i370     | H ?L NF  B  l   p     h
i386     | HM?LQNFI BD lq cpf m d a e
i860     | H ?L NFI BD l   p  m  h
i960     | H SL NFI B  l  c       a
ia64     | HM?LQNFICBD lqrcpf m dha e
ip2k     | ???  N   BD         b h  e
iq2000   | ???L N  C D l  cpfgm    te
m32r     | ??SL N   BD l  c f       es
m68hc11  | HMS  N   BD      f m  h tes
m68k     | HM?L NFI BD l      m  ha e
mcore    | H?SL N   BD l  c fg      es
mips     | HMSLQNFIC D lqrc f mbd   es
mmix     |   SLQNFICBD lq cpf mb ha
mn10300  | ??SL NFI BD l    fgm  h  es
ns32k    | H ?L NFI BD l         h
pa       | HM?LQNFIC   lqrc f   dha
pdp11    | HMS  NF  BD l r p     h
rs6000   | HMSLQNFI BD lqrc f m dha e
s390     | HM?LQNFI BD lqrcpfgmbd a
sh       | HMSLQNFIC D lqrc f m d a e
sparc    | HMSLQNFIC D lqrc f mbdha e
stormy16 | ???  N  CB     cpf    hate
v850     | ??SL N   BD l   pfg      es
vax      | H ?L NF  BD l   pf m  ha
xtensa   | HM?L NFICBD l  cpf mb    e

For AVR simulator, see http://gcc.gnu.org/ml/gcc/2003-10/msg00027.html.