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multiply and add on S/390


Hello,

as stated in 

http://gcc.gnu.org/ml/gcc-patches/2003-08/msg01712.html

triggering the usage of multiply and add through flag_unsafe_math_optimizations 
is not necessary. This patch makes the S/390 backend handling multiply and add 
instructions in the rs6000 way.

The patch introduces the two target options "fused-madd" and "no-fused-madd" 
to make the usage of madd independent from other optimization issues. An 
important point is that "fused-madd" is now turned on by default. 

The result of a multiply and add instruction may differ from a separately executed 
multiply and add. That's why programs depending on this fact need the option 
"no-fused-madd" in order to avoid changed program semantics.

Bootstrapped and regtested on s390x-ibm-linux.
Documentation built. 
OK?

Bye,
Andreas

2003-10-01  Andreas Krebbel <krebbel1@de.ibm.com>

	* config/s390/s390.md ("*fmadddf4", "*fmsubdf4", "*fmaddsf4", 
	"*fmsubsf4"): Insns are now dependent on TARGET_FUSED_MADD instead
	of flag_unsafe_math_optimizations.
	* config/s390/s390.h ("MASK_NO_FUSED_MADD", "TARGET_NO_FUSED_MADD",
	"TARGET_FUSED_MADD", "TARGET_SWITCHES"): Introduced new target flags
	fused-madd and no-fused-madd.
	* doc/invoke.texi: Documented the new options fused-madd and 
	no-fused-madd for S/390.

Index: gcc/doc/invoke.texi
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.339
diff -p -c -r1.339 invoke.texi
*** gcc/doc/invoke.texi	25 Sep 2003 01:25:52 -0000	1.339
--- gcc/doc/invoke.texi	1 Oct 2003 11:15:57 -0000
*************** in the following sections.
*** 620,626 ****
  @gccoptlist{-mtune=@var{cpu-type}  -march=@var{cpu-type} @gol
  -mhard-float  -msoft-float  -mbackchain  -mno-backchain @gol
  -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
! -m64  -m31  -mdebug  -mno-debug  -mesa  -mzarch}
  
  @emph{CRIS Options}
  @gccoptlist{-mcpu=@var{cpu}  -march=@var{cpu}  -mtune=@var{cpu} @gol
--- 620,626 ----
  @gccoptlist{-mtune=@var{cpu-type}  -march=@var{cpu-type} @gol
  -mhard-float  -msoft-float  -mbackchain  -mno-backchain @gol
  -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
! -m64  -m31  -mdebug  -mno-debug  -mesa  -mzarch  -mfused-madd  -mno-fused-madd}
  
  @emph{CRIS Options}
  @gccoptlist{-mcpu=@var{cpu}  -march=@var{cpu}  -mtune=@var{cpu} @gol
*************** except for the ABI and the set of availa
*** 10415,10420 ****
--- 10415,10427 ----
  The list of @var{cpu-type} values is the same as for @option{-march}.
  The default is the value used for @option{-march}.
  
+ @item -mfused-madd
+ @itemx -mno-fused-madd
+ @opindex mfused-madd
+ @opindex mno-fused-madd
+ Generate code that uses (does not use) the floating point multiply and
+ accumulate instructions.  These instructions are generated by default if
+ hardware floating is used.
  @end table
  
  @node CRIS Options
Index: gcc/config/s390/s390.md
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.77
diff -p -c -r1.77 s390.md
*** gcc/config/s390/s390.md	28 Sep 2003 19:17:49 -0000	1.77
--- gcc/config/s390/s390.md	1 Oct 2003 11:15:58 -0000
***************
*** 4190,4196 ****
  	(plus:DF (mult:DF (match_operand:DF 1 "register_operand" "%f,f")
  			  (match_operand:DF 2 "nonimmediate_operand"  "f,R"))
  		 (match_operand:DF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations"
    "@
     madbr\t%0,%1,%2
     madb\t%0,%1,%2"
--- 4190,4196 ----
  	(plus:DF (mult:DF (match_operand:DF 1 "register_operand" "%f,f")
  			  (match_operand:DF 2 "nonimmediate_operand"  "f,R"))
  		 (match_operand:DF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD"
    "@
     madbr\t%0,%1,%2
     madb\t%0,%1,%2"
***************
*** 4202,4208 ****
  	(minus:DF (mult:DF (match_operand:DF 1 "register_operand" "f,f")
  			   (match_operand:DF 2 "nonimmediate_operand"  "f,R"))
  		 (match_operand:DF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations"
    "@
     msdbr\t%0,%1,%2
     msdb\t%0,%1,%2"
--- 4202,4208 ----
  	(minus:DF (mult:DF (match_operand:DF 1 "register_operand" "f,f")
  			   (match_operand:DF 2 "nonimmediate_operand"  "f,R"))
  		 (match_operand:DF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD"
    "@
     msdbr\t%0,%1,%2
     msdb\t%0,%1,%2"
***************
*** 4251,4257 ****
  	(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "%f,f")
  			  (match_operand:SF 2 "nonimmediate_operand"  "f,R"))
  		 (match_operand:SF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations"
    "@
     maebr\t%0,%1,%2
     maeb\t%0,%1,%2"
--- 4251,4257 ----
  	(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "%f,f")
  			  (match_operand:SF 2 "nonimmediate_operand"  "f,R"))
  		 (match_operand:SF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD"
    "@
     maebr\t%0,%1,%2
     maeb\t%0,%1,%2"
***************
*** 4263,4269 ****
  	(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "f,f")
  			   (match_operand:SF 2 "nonimmediate_operand"  "f,R"))
  		  (match_operand:SF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations"
    "@
     msebr\t%0,%1,%2
     mseb\t%0,%1,%2"
--- 4263,4269 ----
  	(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "f,f")
  			   (match_operand:SF 2 "nonimmediate_operand"  "f,R"))
  		  (match_operand:SF 3 "register_operand" "0,0")))]
!   "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD"
    "@
     msebr\t%0,%1,%2
     mseb\t%0,%1,%2"
Index: gcc/config/s390/s390.h
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/s390/s390.h,v
retrieving revision 1.85
diff -p -c -r1.85 s390.h
*** gcc/config/s390/s390.h	26 Sep 2003 16:41:57 -0000	1.85
--- gcc/config/s390/s390.h	1 Oct 2003 11:15:58 -0000
*************** extern int target_flags;
*** 95,100 ****
--- 95,101 ----
  #define MASK_ZARCH                 0x20
  #define MASK_MVCLE                 0x40
  #define MASK_TPF                   0x80
+ #define MASK_NO_FUSED_MADD         0x100
  
  #define TARGET_HARD_FLOAT          (target_flags & MASK_HARD_FLOAT)
  #define TARGET_SOFT_FLOAT          (!(target_flags & MASK_HARD_FLOAT))
*************** extern int target_flags;
*** 105,110 ****
--- 106,113 ----
  #define TARGET_ZARCH               (target_flags & MASK_ZARCH)
  #define TARGET_MVCLE               (target_flags & MASK_MVCLE)
  #define TARGET_TPF                 (target_flags & MASK_TPF)
+ #define TARGET_NO_FUSED_MADD       (target_flags & MASK_NO_FUSED_MADD)
+ #define TARGET_FUSED_MADD	   (! TARGET_NO_FUSED_MADD)
  
  /* ??? Once this actually works, it could be made a runtime option.  */
  #define TARGET_IBM_FLOAT           0
*************** extern int target_flags;
*** 116,138 ****
  #define TARGET_DEFAULT             0x3
  #endif
  
! #define TARGET_SWITCHES                                                \
! { { "hard-float",    1, N_("Use hardware fp")},                        \
!   { "soft-float",   -1, N_("Don't use hardware fp")},                  \
!   { "backchain",     2, N_("Set backchain")},                          \
!   { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
!   { "small-exec",    4, N_("Use bras for executable < 64k")},          \
!   { "no-small-exec",-4, N_("Don't use bras")},                         \
!   { "debug",         8, N_("Additional debug prints")},                \
!   { "no-debug",     -8, N_("Don't print additional debug prints")},    \
!   { "64",           16, N_("64 bit ABI")},                             \
!   { "31",          -16, N_("31 bit ABI")},                             \
!   { "zarch",        32, N_("z/Architecture")},                         \
!   { "esa",         -32, N_("ESA/390 architecture")},                   \
!   { "mvcle",        64, N_("mvcle use")},                              \
!   { "no-mvcle",    -64, N_("mvc&ex")},                                 \
!   { "tpf",         128, N_("enable tpf OS code")},                     \
!   { "no-tpf",     -128, N_("disable tpf OS code")},                    \
    { "", TARGET_DEFAULT, 0 } }
  
  #define TARGET_OPTIONS                                          \
--- 119,143 ----
  #define TARGET_DEFAULT             0x3
  #endif
  
! #define TARGET_SWITCHES                                                  \
! { { "hard-float",      1, N_("Use hardware fp")},                        \
!   { "soft-float",     -1, N_("Don't use hardware fp")},                  \
!   { "backchain",       2, N_("Set backchain")},                          \
!   { "no-backchain",   -2, N_("Don't set backchain (faster, but debug harder")},\
!   { "small-exec",      4, N_("Use bras for executable < 64k")},          \
!   { "no-small-exec",  -4, N_("Don't use bras")},                         \
!   { "debug",           8, N_("Additional debug prints")},                \
!   { "no-debug",       -8, N_("Don't print additional debug prints")},    \
!   { "64",             16, N_("64 bit ABI")},                             \
!   { "31",            -16, N_("31 bit ABI")},                             \
!   { "zarch",          32, N_("z/Architecture")},                         \
!   { "esa",           -32, N_("ESA/390 architecture")},                   \
!   { "mvcle",          64, N_("mvcle use")},                              \
!   { "no-mvcle",      -64, N_("mvc&ex")},                                 \
!   { "tpf",           128, N_("enable tpf OS code")},                     \
!   { "no-tpf",       -128, N_("disable tpf OS code")},                    \
!   { "no-fused-madd", 256, N_("disable fused multiply/add instructions")},\
!   { "fused-madd",   -256, N_("enable fused multiply/add instructions")}, \
    { "", TARGET_DEFAULT, 0 } }
  
  #define TARGET_OPTIONS                                          \


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