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S/390: Minor fixes for add/sub insns


Hello,

while working on adding support for ALC/SLB instructions I've noticed 
a couple of minor issues witht the current add/sub insns; this patch
fixes those:

- Add support for CCL1mode/CCL2mode also with DImode insns.
- Remove addsi3_sub/subsi3_sub which are no longer valid since
  LOAD_EXTEND_OP isn't defined any more
- subdi3_cc/subdi3_cconly was missing the TARGET_64BIT condition
- subsi3_cc had an incorrect op_type attribute.

Bootstrapped/regtested on s390-ibm-linux and s390x-ibm-linux.
Installed on CVS head.

Bye,
Ulrich

ChangeLog:

	* config/s390/s390.md ("*adddi3_carry1_cc", "*adddi3_carry1_cconly",
	"*adddi3_carry2_cc", "*adddi3_carry2_cconly", "*subdi3_borrow_cc",
	"*subdi3_borrow_cconly"): New insns.
	("*addsi3_sub", "*subsi3_sub"): Remove.
	("*subdi3_cc", *subdi3_cconly"): Use only if TARGET_64BIT.
	("*subsi3_cc"): Fix op_type attribute.



Index: gcc/config/s390/s390.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.76
diff -c -p -r1.76 s390.md
*** gcc/config/s390/s390.md	26 Sep 2003 16:41:58 -0000	1.76
--- gcc/config/s390/s390.md	28 Sep 2003 16:10:53 -0000
***************
*** 3156,3161 ****
--- 3156,3211 ----
    "aghi\t%0,%h2"
    [(set_attr "op_type"  "RI")])
  
+ (define_insn "*adddi3_carry1_cc"
+   [(set (reg 33)
+         (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
+                           (match_operand:DI 2 "general_operand" "d,m"))
+                  (match_dup 1)))
+    (set (match_operand:DI 0 "register_operand" "=d,d")
+         (plus:DI (match_dup 1) (match_dup 2)))]
+   "s390_match_ccmode (insn, CCL1mode) && TARGET_64BIT"
+   "@
+    algr\t%0,%2
+    alg\t%0,%2"
+   [(set_attr "op_type"  "RRE,RXY")])
+ 
+ (define_insn "*adddi3_carry1_cconly"
+   [(set (reg 33)
+         (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
+                           (match_operand:DI 2 "general_operand" "d,m"))
+                  (match_dup 1)))
+    (clobber (match_scratch:DI 0 "=d,d"))]
+   "s390_match_ccmode (insn, CCL1mode) && TARGET_64BIT"
+   "@
+    algr\t%0,%2
+    alg\t%0,%2"
+   [(set_attr "op_type"  "RRE,RXY")])
+ 
+ (define_insn "*adddi3_carry2_cc"
+   [(set (reg 33)
+         (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
+                           (match_operand:DI 2 "general_operand" "d,m"))
+                  (match_dup 2)))
+    (set (match_operand:DI 0 "register_operand" "=d,d")
+         (plus:DI (match_dup 1) (match_dup 2)))]
+   "s390_match_ccmode (insn, CCL1mode) && TARGET_64BIT"
+   "@
+    algr\t%0,%2
+    alg\t%0,%2"
+   [(set_attr "op_type"  "RRE,RXY")])
+ 
+ (define_insn "*adddi3_carry2_cconly"
+   [(set (reg 33)
+         (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
+                           (match_operand:DI 2 "general_operand" "d,m"))
+                  (match_dup 2)))
+    (clobber (match_scratch:DI 0 "=d,d"))]
+   "s390_match_ccmode (insn, CCL1mode) && TARGET_64BIT"
+   "@
+    algr\t%0,%2
+    alg\t%0,%2"
+   [(set_attr "op_type"  "RRE,RXY")])
+ 
  (define_insn "*adddi3_cc"
    [(set (reg 33)
          (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
***************
*** 3395,3401 ****
          (compare (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
                   (neg:SI (match_operand:SI 2 "general_operand" "d,R,T"))))
     (clobber (match_scratch:SI 0 "=d,d,d"))]
!   "s390_match_ccmode(insn, CCLmode)"
    "@
     alr\t%0,%2
     al\t%0,%2
--- 3445,3451 ----
          (compare (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
                   (neg:SI (match_operand:SI 2 "general_operand" "d,R,T"))))
     (clobber (match_scratch:SI 0 "=d,d,d"))]
!   "s390_match_ccmode (insn, CCLmode)"
    "@
     alr\t%0,%2
     al\t%0,%2
***************
*** 3413,3429 ****
     ahy\t%0,%2"
    [(set_attr "op_type"  "RX,RXY")])
  
- (define_insn "*addsi3_sub"
-   [(set (match_operand:SI 0 "register_operand" "=d,d")
-         (plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (subreg:SI (match_operand:HI 2 "memory_operand" "R,T") 0)))
-    (clobber (reg:CC 33))]
-   ""
-   "@
-    ah\t%0,%2
-    ahy\t%0,%2"
-   [(set_attr "op_type"  "RX,RXY")])
- 
  (define_insn "addsi3"
    [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
          (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0")
--- 3463,3468 ----
***************
*** 3704,3709 ****
--- 3743,3773 ----
     slgf\t%0,%2"
    [(set_attr "op_type"  "RRE,RXY")])
  
+ (define_insn "*subdi3_borrow_cc"
+   [(set (reg 33)
+         (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
+                            (match_operand:DI 2 "general_operand" "d,m"))
+                  (match_dup 1)))
+    (set (match_operand:DI 0 "register_operand" "=d,d")
+         (minus:DI (match_dup 1) (match_dup 2)))]
+   "s390_match_ccmode (insn, CCL2mode) && TARGET_64BIT"
+   "@
+    slgr\t%0,%2
+    slg\t%0,%2"
+   [(set_attr "op_type"  "RRE,RXY")])
+ 
+ (define_insn "*subdi3_borrow_cconly"
+   [(set (reg 33)
+         (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
+                            (match_operand:DI 2 "general_operand" "d,m"))
+                  (match_dup 1)))
+    (clobber (match_scratch:DI 0 "=d,d"))]
+   "s390_match_ccmode (insn, CCL2mode) && TARGET_64BIT"
+   "@
+    slgr\t%0,%2
+    slg\t%0,%2"
+   [(set_attr "op_type"  "RRE,RXY")])
+ 
  (define_insn "*subdi3_cc"
    [(set (reg 33)
          (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
***************
*** 3711,3717 ****
                   (const_int 0)))
     (set (match_operand:DI 0 "register_operand" "=d,d")
          (minus:DI (match_dup 1) (match_dup 2)))]
!   "s390_match_ccmode (insn, CCLmode)"
    "@
     slgr\t%0,%2
     slg\t%0,%2"
--- 3775,3781 ----
                   (const_int 0)))
     (set (match_operand:DI 0 "register_operand" "=d,d")
          (minus:DI (match_dup 1) (match_dup 2)))]
!   "s390_match_ccmode (insn, CCLmode) && TARGET_64BIT"
    "@
     slgr\t%0,%2
     slg\t%0,%2"
***************
*** 3723,3729 ****
                             (match_operand:DI 2 "general_operand" "d,m"))
                   (const_int 0)))
     (clobber (match_scratch:DI 0 "=d,d"))]
!   "s390_match_ccmode (insn, CCLmode)"
    "@
     slgr\t%0,%2
     slg\t%0,%2"
--- 3787,3793 ----
                             (match_operand:DI 2 "general_operand" "d,m"))
                   (const_int 0)))
     (clobber (match_scratch:DI 0 "=d,d"))]
!   "s390_match_ccmode (insn, CCLmode) && TARGET_64BIT"
    "@
     slgr\t%0,%2
     slg\t%0,%2"
***************
*** 3793,3799 ****
                   (match_dup 1)))
     (set (match_operand:SI 0 "register_operand" "=d,d,d")
          (minus:SI (match_dup 1) (match_dup 2)))]
!   "s390_match_ccmode(insn, CCL2mode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
--- 3857,3863 ----
                   (match_dup 1)))
     (set (match_operand:SI 0 "register_operand" "=d,d,d")
          (minus:SI (match_dup 1) (match_dup 2)))]
!   "s390_match_ccmode (insn, CCL2mode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
***************
*** 3806,3817 ****
                             (match_operand:SI 2 "general_operand" "d,R,T"))
                   (match_dup 1)))
     (clobber (match_scratch:SI 0 "=d,d,d"))]
!   "s390_match_ccmode(insn, CCL2mode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
     sly\t%0,%2"
!   [(set_attr "op_type"  "RR,RX,RXE")])
  
  (define_insn "*subsi3_cc"
    [(set (reg 33)
--- 3870,3881 ----
                             (match_operand:SI 2 "general_operand" "d,R,T"))
                   (match_dup 1)))
     (clobber (match_scratch:SI 0 "=d,d,d"))]
!   "s390_match_ccmode (insn, CCL2mode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
     sly\t%0,%2"
!   [(set_attr "op_type"  "RR,RX,RXY")])
  
  (define_insn "*subsi3_cc"
    [(set (reg 33)
***************
*** 3820,3826 ****
                   (const_int 0)))
     (set (match_operand:SI 0 "register_operand" "=d,d,d")
          (minus:SI (match_dup 1) (match_dup 2)))]
!   "s390_match_ccmode(insn, CCLmode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
--- 3884,3890 ----
                   (const_int 0)))
     (set (match_operand:SI 0 "register_operand" "=d,d,d")
          (minus:SI (match_dup 1) (match_dup 2)))]
!   "s390_match_ccmode (insn, CCLmode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
***************
*** 3833,3839 ****
                             (match_operand:SI 2 "general_operand" "d,R,T"))
                   (const_int 0)))
     (clobber (match_scratch:SI 0 "=d,d,d"))]
!   "s390_match_ccmode(insn, CCLmode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
--- 3897,3903 ----
                             (match_operand:SI 2 "general_operand" "d,R,T"))
                   (const_int 0)))
     (clobber (match_scratch:SI 0 "=d,d,d"))]
!   "s390_match_ccmode (insn, CCLmode)"
    "@
     slr\t%0,%2
     sl\t%0,%2
***************
*** 3844,3860 ****
    [(set (match_operand:SI 0 "register_operand" "=d,d")
          (minus:SI (match_operand:SI 1 "register_operand" "0,0")
                    (sign_extend:SI (match_operand:HI 2 "memory_operand" "R,T"))))
-    (clobber (reg:CC 33))]
-   ""
-   "@
-    sh\t%0,%2
-    shy\t%0,%2"
-   [(set_attr "op_type"  "RX,RXY")])
- 
- (define_insn "*subsi3_sub"
-   [(set (match_operand:SI 0 "register_operand" "=d,d")
-         (minus:SI (match_operand:SI 1 "register_operand" "0,0")
-                   (subreg:SI (match_operand:HI 2 "memory_operand" "R,T") 0)))
     (clobber (reg:CC 33))]
    ""
    "@
--- 3908,3913 ----
-- 
  Dr. Ulrich Weigand
  weigand@informatik.uni-erlangen.de


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