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Re: Makefile.in: Simplify recursive make callings.
- From: "Zack Weinberg" <zack at codesourcery dot com>
- To: Kelley Cook <kelleycook at wideopenwest dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Fri, 05 Sep 2003 08:55:25 -0700
- Subject: Re: Makefile.in: Simplify recursive make callings.
- References: <3F58B067.3020404@ford.com>
Kelley Cook <kcook34@ford.com> writes:
> This patch simply defines a new variable within GCC's Makefile.in
>
> REMAKE=$(MAKE) LANGUAGES="$(LANGUAGES)" BOOT_CFLAGS="$(BOOT_CFLAGS)"
>
> and replaces all of those calls with $(REMAKE).
Make handles commands with $(MAKE) in them specially. It is not clear
to me that this still works if the $(MAKE) comes from a variable.
Therefore I'd prefer that you did this
REMAKEARGS= LANGUAGES="$(LANGUAGES)" BOOT_CFLAGS="$(BOOT_CFLAGS)"
...
foo:
$(MAKE) $(REMAKEARGS) ...
even though that's more verbose. Or else find out for sure that your
original code is safe.
zw