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Re: [patch] convert some call ABI macros to hooks, apply to sh, add bitfield swapper


> I'm going through the SH-specific changes only.  I have only cosmetic
> changes to request, assuming the changes from macro to functions were
> only mechanical, such that I don't have to check that the logic is
> unchanged.  Is this the case?  If not, could you please highlight the
> changes (maybe even submit them separately, if it's not too
> difficult)?  Thanks,

Here is a diff between a mechananical change and the final result, so
you can see the logical changes for the functions that used to be
macros:

*** sh.c.mech	Tue Aug 26 21:12:04 2003
--- sh.c	Wed Aug 13 15:49:30 2003
*************** sh_function_arg (ca, mode, type, named)
*** 6370,6376 ****
  {
    if (! TARGET_SH5
        && PASS_IN_REG_P ((*ca), (mode), (type))
!       && ((named) || !TARGET_HITACHI))
      {
        int regno;
  
--- 6370,6376 ----
  {
    if (! TARGET_SH5
        && PASS_IN_REG_P ((*ca), (mode), (type))
!       && ((named) || !(TARGET_HITACHI || (*ca).renesas_abi)))
      {
        int regno;
  
*************** sh_function_arg (ca, mode, type, named)
*** 6390,6398 ****
  	  return gen_rtx_PARALLEL(SCmode, gen_rtvec(2, r1, r2));
  	}
  
        regno = (BASE_ARG_REG (mode) + ROUND_REG ((*ca), (mode)))
  	       ^ ((mode) == SFmode && TARGET_SH4
! 		  && TARGET_LITTLE_ENDIAN != 0);
        return gen_rtx_REG (mode, regno);
  
      }
--- 6390,6404 ----
  	  return gen_rtx_PARALLEL(SCmode, gen_rtvec(2, r1, r2));
  	}
  
+       if ((TARGET_HITACHI || ca->renesas_abi)
+ 	  && ca->free_single_fp_reg
+ 	  && mode == SFmode)
+ 	return gen_rtx_REG (mode, ca->free_single_fp_reg);
+ 
        regno = (BASE_ARG_REG (mode) + ROUND_REG ((*ca), (mode)))
  	       ^ ((mode) == SFmode && TARGET_SH4
! 		  && TARGET_LITTLE_ENDIAN != 0
! 		  && !TARGET_HITACHI && !(*ca).renesas_abi);
        return gen_rtx_REG (mode, regno);
  
      }
*************** sh_function_arg_advance (ca, mode, type,
*** 6559,6565 ****
       return;
     }
  
!  if (! TARGET_SH4
       || PASS_IN_REG_P ((*ca), (mode), (type)))
     ((*ca).arg_count[(int) GET_SH_ARG_CLASS (mode)]
      = (ROUND_REG ((*ca), (mode))
--- 6565,6586 ----
       return;
     }
  
!  if ((TARGET_HITACHI || ca->renesas_abi) && TARGET_FPU_DOUBLE)
!    {
!      if ((mode) == SFmode && (*ca).free_single_fp_reg)
!        {
! 	 (*ca).free_single_fp_reg = 0;
! 	 return;
!        }
!      if ((mode) == DFmode
! 	 && ROUND_REG (*ca, DFmode) != ROUND_REG (*ca, SFmode))
!        {
! 	 (*ca).free_single_fp_reg = (ROUND_REG (*ca, SFmode)
! 				     + BASE_ARG_REG (mode));
!        }
!    }
! 
!  if (! (TARGET_SH4 || ca->renesas_abi)
       || PASS_IN_REG_P ((*ca), (mode), (type)))
     ((*ca).arg_count[(int) GET_SH_ARG_CLASS (mode)]
      = (ROUND_REG ((*ca), (mode))
*************** sh_return_in_memory (type, fndecl)
*** 6600,6606 ****
    else
      {
        return (TYPE_MODE (type) == BLKmode
! 	      || (TARGET_HITACHI
  		  && TREE_CODE (type) == RECORD_TYPE));
      }
  }
--- 6621,6627 ----
    else
      {
        return (TYPE_MODE (type) == BLKmode
! 	      || ((TARGET_HITACHI || sh_attr_renesas_p(fndecl))
  		  && TREE_CODE (type) == RECORD_TYPE));
      }
  }


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