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Shifts by constants > 31 may generate illegal sparc assembler output

The test program in [Bug c/11965] as well as real world code may cause gcc 3.3.1
to emit shifts by constants > 31 bit as illegal sparc code (if compiling for
64 bit targets).

The fix is easy: for 32bit targets (where this probably can not happen, but
according to Ian L. Taylor I can not rely on that) restrict the shift count
to the possible range; for 64bit targets use the apropriate assembler
instructions able to deal with bigger shift counts.

ChangeLog: use 64bit shift instructions where apropriate if shifting >31 bits.

Bootstrapping and testing:
I ran the testsuite on NetBSD/sparc64 before and after the patch, and
did not find any regressions.

This patch is identical to attachement #1 in [Bug c/11965].

Martin

Attachment: sparc.md.patch
Description: Text document

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