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Re: [PATCH] Promoted variable SUBREG optimizations
- From: Richard Henderson <rth at redhat dot com>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Mon, 11 Aug 2003 14:30:03 -0700
- Subject: Re: [PATCH] Promoted variable SUBREG optimizations
- References: <Pine.LNX.4.44.0308090902050.6223-100000@www.eyesopen.com>
On Sat, Aug 09, 2003 at 09:33:25AM -0600, Roger Sayle wrote:
> But most importantly, when generating the SUBREG it records the fact
> that source register already contains the sign or zero extended
> DImode representation of the value for the RTL optimizers to use.
Well, the thing is, at best all it says is that at one point the
value contained a sign extended representation of the value. Even
there I would only really trust the "at one time" part to apply to
parameters, not local variables.
> * simplify-rtx.c (simplify_unary_operation): Optimize sign and
> zero-extensions of subregs of promoted variables where the
> extension is identical to that used to promote the variable.
For instance, by the time we get to combine, we could have generated
(define_insn "*addsi_internal"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
(plus:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ,rJ,rJ")
(match_operand:SI 2 "add_operand" "rI,O,K,L")))]
""
"@
addl %r1,%2,%0
subl %r1,%n2,%0
lda %0,%2(%r1)
ldah %0,%h2(%r1)")
Note that the last two alternatives do *not* preserve sign extesion
to DImode. And yet there's nothing stopping an extended subreg from
being placed here.
I think extended subregs are a fringe feature that too many parts of
the compiler don't know about, and so don't universally ensure that
its constraints are really met. I don't think you can *realiably*
add code that depends on it.
r~