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In message <wvnel1h6clf.fsf@talisman.cambridge.redhat.com>, Richard Sandiford w rites: >law@redhat.com writes: >> In message <20030625213533.GB4249@redhat.com>, Richard Henderson writes: >> >On Wed, Jun 25, 2003 at 01:34:49PM -0600, law@redhat.com wrote: >> >> I haven't followed this discussion closely, but what was the original >> >> motivation behind wanting more machine dependent hooks? >> > >> >Wanting to add the required nops to the mips insn stream after dbr. >> And we can't do this like every other port during assembly output because? > >"Every other port"? ;) I thought nop-inserting assemblers were >the exception rather than the rule. During assembly output, not by the assembler :-) Several ports emit nops for unfilled delay slots while they're generating assembly code (PA and Sparc come immediately to mind). >But the motivation in this case is to get a better idea about >instruction alignment. There are targets for which it is more >efficient to align branch insns. And there are targets that >can only dual issue insns when the first one is 8-byte aligned. > >If we knew what alignment instructions had, we could do >something like align_align_insns(). Seems to me you could actually do this in reorg. By the end of reorg we know every insn that had an unfilled, non-nullifable delay slot. It seems to me you could walk that list of unfilled slots and put a fresh NOP insn in each. That would get you explicit NOPs for your alignment work and probably wouldn't be terribly difficult to implement. I'm assuming that all the other wonderful things the MIPS assembler does to your code are somehow being avoided (.nomacro .noreorder?) Otherwise your work will largely go to waste when the assembler gets started. jeff
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