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Re: target register load optimizations
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: joern dot rennecke at superh dot com
- Cc: rth at redhat dot com, gcc-patches at gcc dot gnu dot org, stephen dot clarke at st dot com, jsm28 at cam dot ac dot uk
- Date: Wed, 18 Jun 2003 17:08:56 -0400 (EDT)
- Subject: Re: target register load optimizations
- References: <3EF0AC80.82873284@superh.com>
Hi Joern,
> > It turned out that there was a problem with running flow betweeen
> > reload and epilogue generation. mark_regs_live_at_end uses
> > HAVE_epilogue && reload_completed to check if an rtl epilogue
> > has already been generated. I've introduced a new variable
> > epilogue_comleted for this and patched rtl.h, flow.c, toplev.c,
> > function.c, config/ia64/ia64.c, config/rs6000/rs6000.c,
> > config/sh/sh.c and config/sparc/sparc.c accordingly.
>
> Attached is the new version of the patch.
This patch seems to cause the h8300 port not to build, saying
libbackend.a(bt-load.o)(.text+0x1e13): In function `migrate_btr_def':
/home/kazu/gnu/gcc/gcc-head/gcc/gcc/bt-load.c:1209: undefined reference to `insn_default_latency'
libbackend.a(bt-load.o)(.text+0x20ba):/home/kazu/gnu/gcc/gcc-head/gcc/gcc/bt-load.c:1211: undefined reference to `result_ready_cost'
collect2: ld returned 1 exit status
Could you take a look at this?
Thanks,
Kazu Hirata