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Re: Alias Analysis Improvement Patch
Andreas Jaeger wrote:
>
> "Sanjiv Kumar Gupta, Noida" <sanjivg@noida.hcltech.com> writes:
>
> > Hi,
> >
> > Attached is the patch based on the paper that
> > I presented at GCC summit. The patch is enabled
> > by a new compiler option called -falias-arithmetic.
> > The patch is tested for x86, sh-elf, and mips-elf.
> > I do not have access to an ia64, so could not do
> > make check for that but stress-1.17 is clear for ia64-elf.
> > The code size improvements are given below.
> >
> > gcc version 3.4 20030609 (experimental)
> > options#1 -O2 -funroll-all-loops
> > options#2 -O2 -funroll-all-loops -falias-arithmetic
> > .text size comparisons for ia64-elf
> > ----------------------------------
> > filename options#1 options#2
> >
> > dct64.lst 16256 15408
> > dogmove.lst 26555 26571
> > g_combat.lst 11403 11371
> > g_func.lst 50077 50109
>
> So, you have both regressions and improvements? How does this effect
> execution speed? What are the results on x86?
I've asked Sanjiv to submit the patch on the summit. The patch could
improve ia64 performance (especially insn scheduling). Aliasing is a
weak part of ia64 port. Because the patch is aimed to improve code for
architectures without base reg + disp addressing, it probably will not
improve code for x86 (so it can be switched off for such ports).
Another question in the patch adoption is that SSA already has alias
analysis and I don't know yet is it possible to propagate this
information to rtl level. If there will be such mechanism, then
probably we don't need this patch.
So I think this patch is not for approval in near future but for its
investigation. I am going to look at this patch for ia64 platform.
Sanjiv, thanks for submitting the patch.
Vlad