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[X86] PR4490 Correct -m128bit-long-double support
- From: Kelley Cook <kcook34 at ford dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: jakub at redhat dot com, jh at suse dot cz, wilson at tuliptree dot org, stl at caltech dot edu
- Date: Wed, 04 Jun 2003 17:16:53 -0400
- Subject: [X86] PR4490 Correct -m128bit-long-double support
- Hop-count: 1
- Reply-to: Kelley Cook <KelleyCook at wideopenwest dot com>
http://gcc.gnu.org/PR4490 is about a problem with -m128-bit-long-double
support.
Both Jim Wilson: http://gcc.gnu.org/ml/gcc/2003-06/msg00212.html
and
Jakub Jelinek/Jan Hubicka: http://gcc.gnu.org/ml/gcc/2002-02/msg01190.html
said that the fix was to replace the XF mode constraint in i386.md of
!TARGET_64BIT with !TARGET_128BIT_LONG_DOUBLE, which is exactly what
this mechanical patch does.
It fixes the PR4490 minimal test case and bootstraps on
pentium4-pc-cygwin with no-regressions.
That being said, I then proceded to spend quite a bit of time on why
-m128bit-long-doublereally wasn't doing much. The RTL generates
correctly as TF mode (as opposed to XF mode), but the assembly output in
either x87 or SSE2 mode was basically identical to -m96bit-long-double
besides an additional '.long 0' being addded to each long double value
stored in memory. It certainly did not enable 128-bit floats as the
name implies.
After much detective work, I realized that I was being stupid and
neither SSE2 nor x87 has hardware for 128-bit floats and for x86 128-bit
float mode is just the legacy 8087-80 bit mode with an extra zero of
padding.
So in addition to the mechanical change, I would also propose to update
the docs as below so nobody else wastes time like I did.
BTW, I also cross compiled to x86_64-pc-linux, and inspection of the
assembly with "-fverbose-asm" shows that the x86-64 compiler appears to
be properly using 128BIT_LONG_DOUBLE. However, note that
-m96bit-long-double cannot be set in x86-64 mode due to line 1375 in
i386.c which unconditionally sets MASK_128BIT_LONG_DOUBLE when
TARGET_64BIT. Allowing it to be set, just led to ICEs.
Personally, since:
a) the -m128-bit-long-double option doesn't currently work in IA32 mode
b) if fixed they just break i386 ABI
c) they don't enable what a naive user would think they enable
and
d) the options are intentionally disabled in x86-64 mode since 96-bit
floats would break ABI on that platform.
I would advocate just eliminating the user setable
-m{96,128}bit-long-double options and leaving the .md file the way it
currently is.
BTW, I do not have CVS Write access, but then again, I don't advocate
installing this patch.
Kelley Cook
2003-06-04 Kelley Cook <kelleycook@wideopenwest.com>
PR optimization/4490
* config/i386/i386.md: Don't use XFMode if TARGET_128BIT_LONG_DOUBLE.
* doc/invoke.texi (m96bit-long-double, m128bit-long-double): Reword
documentation to accurately reflect what these options do.
diff -upr gcc.orig/config/i386/i386.md gcc/config/i386/i386.md
--- gcc.orig/config/i386/i386.md 2003-06-04 13:53:20.000000000 -0400
+++ gcc/config/i386/i386.md 2003-06-04 12:21:38.000000000 -0400
@@ -703,7 +703,7 @@
[(set (reg:CC 17)
(compare:CC (match_operand:XF 0 "cmp_fp_expander_operand" "")
(match_operand:XF 1 "cmp_fp_expander_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
ix86_compare_op0 = operands[0];
ix86_compare_op1 = operands[1];
@@ -837,7 +837,7 @@
(compare:CCFP
(match_operand:XF 0 "register_operand" "f")
(match_operand:XF 1 "register_operand" "f")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"* return output_fp_compare (insn, operands, 0, 0);"
[(set_attr "type" "fcmp")
(set_attr "mode" "XF")])
@@ -859,7 +859,7 @@
(match_operand:XF 1 "register_operand" "f")
(match_operand:XF 2 "register_operand" "f"))]
UNSPEC_FNSTSW))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"* return output_fp_compare (insn, operands, 2, 0);"
[(set_attr "type" "multi")
(set_attr "mode" "XF")])
@@ -2736,7 +2736,7 @@
(define_expand "movxf"
[(set (match_operand:XF 0 "nonimmediate_operand" "")
(match_operand:XF 1 "general_operand" ""))]
- "!TARGET_64BIT"
+ "!TARGET_128BIT_LONG_DOUBLE"
"ix86_expand_move (XFmode, operands); DONE;")
(define_expand "movtf"
@@ -2755,7 +2755,7 @@
(define_insn "*pushxf_nointeger"
[(set (match_operand:XF 0 "push_operand" "=X,X,X")
(match_operand:XF 1 "general_no_elim_operand" "f,Fo,*r"))]
- "!TARGET_64BIT && optimize_size"
+ "!TARGET_128BIT_LONG_DOUBLE && optimize_size"
{
/* This insn should be already splitted before reg-stack. */
abort ();
@@ -2777,7 +2777,7 @@
(define_insn "*pushxf_integer"
[(set (match_operand:XF 0 "push_operand" "=<,<")
(match_operand:XF 1 "general_no_elim_operand" "f#r,ro#f"))]
- "!TARGET_64BIT && !optimize_size"
+ "!TARGET_128BIT_LONG_DOUBLE && !optimize_size"
{
/* This insn should be already splitted before reg-stack. */
abort ();
@@ -2810,7 +2810,7 @@
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(match_operand:XF 1 "any_fp_register_operand" ""))]
- "!TARGET_64BIT"
+ "!TARGET_128BIT_LONG_DOUBLE"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (match_dup 1))])
@@ -2832,7 +2832,7 @@
(define_insn "*movxf_nointeger"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,*r,o")
(match_operand:XF 1 "general_operand" "fm,f,G,*roF,F*r"))]
- "!TARGET_64BIT
+ "!TARGET_128BIT_LONG_DOUBLE
&& optimize_size
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (reload_in_progress || reload_completed
@@ -2922,7 +2922,7 @@
(define_insn "*movxf_integer"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,o")
(match_operand:XF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
- "!TARGET_64BIT
+ "!TARGET_128BIT_LONG_DOUBLE
&& !optimize_size
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (reload_in_progress || reload_completed
@@ -3589,7 +3589,7 @@
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(float_extend:XF (match_operand:SF 1 "fp_register_operand" "")))]
- "!TARGET_64BIT"
+ "!TARGET_128BIT_LONG_DOUBLE"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
@@ -3622,7 +3622,7 @@
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(float_extend:XF (match_operand:DF 1 "fp_register_operand" "")))]
- "!TARGET_64BIT"
+ "!TARGET_128BIT_LONG_DOUBLE"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
@@ -3704,7 +3704,7 @@
(define_expand "extendsfxf2"
[(set (match_operand:XF 0 "nonimmediate_operand" "")
(float_extend:XF (match_operand:SF 1 "general_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
/* ??? Needed for compress_float_constant since all fp constants
are LEGITIMATE_CONSTANT_P. */
@@ -3717,7 +3717,7 @@
(define_insn "*extendsfxf2_1"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m")
(float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))]
- "!TARGET_64BIT && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
switch (which_alternative)
@@ -3794,7 +3794,7 @@
(define_expand "extenddfxf2"
[(set (match_operand:XF 0 "nonimmediate_operand" "")
(float_extend:XF (match_operand:DF 1 "general_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
/* ??? Needed for compress_float_constant since all fp constants
are LEGITIMATE_CONSTANT_P. */
@@ -3807,7 +3807,7 @@
(define_insn "*extenddfxf2_1"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m")
(float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,f")))]
- "!TARGET_64BIT && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
switch (which_alternative)
@@ -4126,7 +4126,7 @@
(float_truncate:SF
(match_operand:XF 1 "register_operand" "")))
(clobber (match_dup 2))])]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"operands[2] = assign_386_stack_local (SFmode, 0);")
(define_insn "*truncxfsf2_1"
@@ -4134,7 +4134,7 @@
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f,f,f,f")))
(clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
switch (which_alternative)
{
@@ -4154,7 +4154,7 @@
[(set (match_operand:SF 0 "memory_operand" "=m")
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return "fstp%z0\t%y0";
@@ -4251,7 +4251,7 @@
(float_truncate:DF
(match_operand:XF 1 "register_operand" "")))
(clobber (match_dup 2))])]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"operands[2] = assign_386_stack_local (DFmode, 0);")
(define_insn "*truncxfdf2_1"
@@ -4259,7 +4259,7 @@
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f,f,f,f")))
(clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
switch (which_alternative)
{
@@ -4280,7 +4280,7 @@
[(set (match_operand:DF 0 "memory_operand" "=m")
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
{
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return "fstp%z0\t%y0";
@@ -4380,7 +4380,7 @@
(define_expand "fix_truncxfdi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "")
(fix:DI (match_operand:XF 1 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "fix_trunctfdi2"
@@ -4547,7 +4547,7 @@
(define_expand "fix_truncxfsi2"
[(set (match_operand:SI 0 "nonimmediate_operand" "")
(fix:SI (match_operand:XF 1 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "fix_trunctfsi2"
@@ -4708,7 +4708,7 @@
(define_expand "fix_truncxfhi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "")
(fix:HI (match_operand:XF 1 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "fix_trunctfhi2"
@@ -5060,7 +5060,7 @@
(define_insn "floathixf2"
[(set (match_operand:XF 0 "register_operand" "=f,f")
(float:XF (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"@
fild%z1\t%1
#"
@@ -5082,7 +5082,7 @@
(define_insn "floatsixf2"
[(set (match_operand:XF 0 "register_operand" "=f,f")
(float:XF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"@
fild%z1\t%1
#"
@@ -5104,7 +5104,7 @@
(define_insn "floatdixf2"
[(set (match_operand:XF 0 "register_operand" "=f,f")
(float:XF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"@
fild%z1\t%1
#"
@@ -6814,7 +6814,7 @@
[(set (match_operand:XF 0 "register_operand" "")
(plus:XF (match_operand:XF 1 "register_operand" "")
(match_operand:XF 2 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "addtf3"
@@ -7167,7 +7167,7 @@
[(set (match_operand:XF 0 "register_operand" "")
(minus:XF (match_operand:XF 1 "register_operand" "")
(match_operand:XF 2 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "subtf3"
@@ -7685,7 +7685,7 @@
[(set (match_operand:XF 0 "register_operand" "")
(mult:XF (match_operand:XF 1 "register_operand" "")
(match_operand:XF 2 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "multf3"
@@ -7739,7 +7739,7 @@
[(set (match_operand:XF 0 "register_operand" "")
(div:XF (match_operand:XF 1 "register_operand" "")
(match_operand:XF 2 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"")
(define_expand "divtf3"
@@ -10152,7 +10152,7 @@
[(parallel [(set (match_operand:XF 0 "nonimmediate_operand" "")
(neg:XF (match_operand:XF 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))])]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"ix86_expand_unary_operator (NEG, XFmode, operands); DONE;")
(define_expand "negtf2"
@@ -10169,7 +10169,7 @@
[(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,rm#f")
(neg:XF (match_operand:XF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
- "!TARGET_64BIT && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387
&& ix86_unary_operator_ok (NEG, XFmode, operands)"
"#")
@@ -10257,7 +10257,7 @@
(define_insn "*negxf2_1"
[(set (match_operand:XF 0 "register_operand" "=f")
(neg:XF (match_operand:XF 1 "register_operand" "0")))]
- "!TARGET_64BIT && TARGET_80387 && reload_completed"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && reload_completed"
"fchs"
[(set_attr "type" "fsgn")
(set_attr "mode" "XF")
@@ -10267,7 +10267,7 @@
[(set (match_operand:XF 0 "register_operand" "=f")
(neg:XF (float_extend:XF
(match_operand:DF 1 "register_operand" "0"))))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"fchs"
[(set_attr "type" "fsgn")
(set_attr "mode" "XF")
@@ -10277,7 +10277,7 @@
[(set (match_operand:XF 0 "register_operand" "=f")
(neg:XF (float_extend:XF
(match_operand:SF 1 "register_operand" "0"))))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"fchs"
[(set_attr "type" "fsgn")
(set_attr "mode" "XF")
@@ -10614,7 +10614,7 @@
[(parallel [(set (match_operand:XF 0 "nonimmediate_operand" "")
(neg:XF (match_operand:XF 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))])]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"ix86_expand_unary_operator (ABS, XFmode, operands); DONE;")
(define_expand "abstf2"
@@ -10631,7 +10631,7 @@
[(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,rm#f")
(abs:XF (match_operand:XF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
- "!TARGET_64BIT && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387
&& ix86_unary_operator_ok (ABS, XFmode, operands)"
"#")
@@ -10710,7 +10710,7 @@
(define_insn "*absxf2_1"
[(set (match_operand:XF 0 "register_operand" "=f")
(abs:XF (match_operand:XF 1 "register_operand" "0")))]
- "!TARGET_64BIT && TARGET_80387 && reload_completed"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && reload_completed"
"fabs"
[(set_attr "type" "fsgn")
(set_attr "mode" "DF")])
@@ -10719,7 +10719,7 @@
[(set (match_operand:XF 0 "register_operand" "=f")
(abs:XF (float_extend:XF
(match_operand:DF 1 "register_operand" "0"))))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"fabs"
[(set_attr "type" "fsgn")
(set_attr "mode" "XF")])
@@ -10728,7 +10728,7 @@
[(set (match_operand:XF 0 "register_operand" "=f")
(abs:XF (float_extend:XF
(match_operand:SF 1 "register_operand" "0"))))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"fabs"
[(set_attr "type" "fsgn")
(set_attr "mode" "XF")])
@@ -14715,7 +14715,7 @@
(match_operator:XF 3 "binary_fp_operator"
[(match_operand:XF 1 "register_operand" "%0")
(match_operand:XF 2 "register_operand" "f")]))]
- "!TARGET_64BIT && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@@ -14991,7 +14991,7 @@
(match_operator:XF 3 "binary_fp_operator"
[(match_operand:XF 1 "register_operand" "0,f")
(match_operand:XF 2 "register_operand" "f,0")]))]
- "!TARGET_64BIT && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@@ -15025,7 +15025,7 @@
(match_operator:XF 3 "binary_fp_operator"
[(float:XF (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
(match_operand:XF 2 "register_operand" "0,0")]))]
- "!TARGET_64BIT && TARGET_80387 && TARGET_USE_FIOP"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && TARGET_USE_FIOP"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:XF 3 "mult_operator" "")
@@ -15061,7 +15061,7 @@
(match_operator:XF 3 "binary_fp_operator"
[(match_operand:XF 1 "register_operand" "0,0")
(float:XF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
- "!TARGET_64BIT && TARGET_80387 && TARGET_USE_FIOP"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && TARGET_USE_FIOP"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:XF 3 "mult_operator" "")
@@ -15097,7 +15097,7 @@
(match_operator:XF 3 "binary_fp_operator"
[(float_extend:XF (match_operand 1 "nonimmediate_operand" "fm,0"))
(match_operand:XF 2 "register_operand" "0,f")]))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:XF 3 "mult_operator" "")
@@ -15130,7 +15130,7 @@
[(match_operand:XF 1 "register_operand" "0,f")
(float_extend:XF
(match_operand 2 "nonimmediate_operand" "fm,0"))]))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:XF 3 "mult_operator" "")
@@ -15165,7 +15165,7 @@
(match_operand 1 "register_operand" "0,f"))
(float_extend:XF
(match_operand 2 "nonimmediate_operand" "fm,0"))]))]
- "!TARGET_64BIT && TARGET_80387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:XF 3 "mult_operator" "")
@@ -15331,7 +15331,7 @@
(define_insn "sqrtxf2"
[(set (match_operand:XF 0 "register_operand" "=f")
(sqrt:XF (match_operand:XF 1 "register_operand" "0")))]
- "!TARGET_64BIT && TARGET_80387 && !TARGET_NO_FANCY_MATH_387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && !TARGET_NO_FANCY_MATH_387
&& (TARGET_IEEE_FP || flag_unsafe_math_optimizations) "
"fsqrt"
[(set_attr "type" "fpspc")
@@ -15352,7 +15352,7 @@
[(set (match_operand:XF 0 "register_operand" "=f")
(sqrt:XF (float_extend:XF
(match_operand:DF 1 "register_operand" "0"))))]
- "!TARGET_64BIT && TARGET_80387 && !TARGET_NO_FANCY_MATH_387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && !TARGET_NO_FANCY_MATH_387"
"fsqrt"
[(set_attr "type" "fpspc")
(set_attr "mode" "XF")
@@ -15372,7 +15372,7 @@
[(set (match_operand:XF 0 "register_operand" "=f")
(sqrt:XF (float_extend:XF
(match_operand:SF 1 "register_operand" "0"))))]
- "!TARGET_64BIT && TARGET_80387 && !TARGET_NO_FANCY_MATH_387"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && !TARGET_NO_FANCY_MATH_387"
"fsqrt"
[(set_attr "type" "fpspc")
(set_attr "mode" "XF")
@@ -15420,7 +15420,7 @@
(define_insn "sinxf2"
[(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] UNSPEC_SIN))]
- "!TARGET_64BIT && TARGET_80387 && !TARGET_NO_FANCY_MATH_387
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_80387 && !TARGET_NO_FANCY_MATH_387
&& flag_unsafe_math_optimizations"
"fsin"
[(set_attr "type" "fpspc")
@@ -15467,7 +15467,7 @@
(define_insn "cosxf2"
[(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] UNSPEC_COS))]
- "!TARGET_64BIT && ! TARGET_NO_FANCY_MATH_387 && TARGET_80387
+ "!TARGET_128BIT_LONG_DOUBLE && ! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations"
"fcos"
[(set_attr "type" "fpspc")
@@ -16887,7 +16887,7 @@
(if_then_else:XF (match_operand 1 "comparison_operator" "")
(match_operand:XF 2 "register_operand" "")
(match_operand:XF 3 "register_operand" "")))]
- "!TARGET_64BIT && TARGET_CMOVE"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_expand "movtfcc"
@@ -16904,7 +16904,7 @@
[(reg 17) (const_int 0)])
(match_operand:XF 2 "register_operand" "f,0")
(match_operand:XF 3 "register_operand" "0,f")))]
- "!TARGET_64BIT && TARGET_CMOVE"
+ "!TARGET_128BIT_LONG_DOUBLE && TARGET_CMOVE"
"@
fcmov%F1\t{%2, %0|%0, %2}
fcmov%f1\t{%3, %0|%0, %3}"
diff -upr gcc.orig/doc/invoke.texi gcc/doc/invoke.texi
--- gcc.orig/doc/invoke.texi 2003-06-03 08:55:00.000000000 -0400
+++ gcc/doc/invoke.texi 2003-06-04 12:13:17.000000000 -0400
@@ -8231,22 +8231,33 @@ the published application binary interfa
and will not be binary compatible with structures in code compiled
without that switch.
+@item -m96bit-long-double
@item -m128bit-long-double
+@opindex m96bit-long-double
@opindex m128bit-long-double
-Control the size of @code{long double} type. i386 application binary interface
-specify the size to be 12 bytes, while modern architectures (Pentium and newer)
-prefer @code{long double} aligned to 8 or 16 byte boundary. This is
-impossible to reach with 12 byte long doubles in the array accesses.
+These switches control the size of @code{long double} type. The i386
+application binary interface specifies the size to be 96 bits,
+so @option{-m96bit-long-double} is the default in 32 bit mode.
+
+Modern architectures (Pentium and newer) would prefer @code{long double}
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the ABI, this would not be possible. So specifying a
+@option{-m128bit-long-double} will align @code{long double}
+to a 16 byte boundary by padding the @code{long double} with an additional
+32 bit zero.
+
+In the x86-64 compiler, @option{-m128bit-long-double} is the default choice as
+its ABI specifies that @code{long double} is to be aligned on 16 byte boundary.
+
+Notice that neither of these options enable any extra precision over the x87
+standard of 80 bits for a @code{long double}.
-@strong{Warning:} if you use the @option{-m128bit-long-double} switch, the
+@strong{Warning:} if you override the default value for your target ABI, the
structures and arrays containing @code{long double} will change their size as
well as function calling convention for function taking @code{long double}
-will be modified.
+will be modified. Hence they will not be binary compatible with arrays or
+structures in code compiled without that switch.
-@item -m96bit-long-double
-@opindex m96bit-long-double
-Set the size of @code{long double} to 96 bits as required by the i386
-application binary interface. This is the default.
@item -msvr3-shlib
@itemx -mno-svr3-shlib