This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Various gp-related mips optimisations


Here's an alternative, diffed against the previous version.  It emits
the instructions using C code rather than an .md expander.

Of course, this version still uses reg_maybe_dead notes, so if
you didn't like that, you probably won't like this either ;).

Bootstrap build completed on mips-sgi-irix6.5, tests still running.

Richard


	* config/mips/mips.c (mips_gp_insn): New function.
	(mips_expand_prologue): Use it to emit the loadgp instructions
	individually.
	* config/mips/mips.md (loadgp): Remove.

diff --exclude=CVS -cpdr mips.foo/mips.c mips/mips.c
*** mips.foo/mips.c	Thu May 29 11:53:05 2003
--- mips/mips.c	Thu May 29 11:54:09 2003
*************** static rtx mips_frame_set			PARAMS ((rtx
*** 240,245 ****
--- 240,246 ----
  static void mips_emit_frame_related_store	PARAMS ((rtx, rtx,
  							 HOST_WIDE_INT));
  static void save_restore_insns			PARAMS ((int, rtx, long));
+ static void mips_gp_insn			PARAMS ((rtx, rtx));
  static void mips16_fp_args			PARAMS ((FILE *, int, int));
  static void build_mips16_function_stub		PARAMS ((FILE *));
  static void mips16_optimize_gp			PARAMS ((rtx));
*************** mips_output_function_prologue (file, siz
*** 7483,7488 ****
--- 7484,7510 ----
  	     reg_names[PIC_FUNCTION_ADDR_REGNUM]);
  }
  
+ /* Emit an instruction to move SRC into DEST.  When generating
+    explicit reloc code, mark the instruction as potentially dead.  */
+ 
+ static void
+ mips_gp_insn (dest, src)
+      rtx dest, src;
+ {
+   rtx insn;
+ 
+   insn = emit_insn (gen_rtx_SET (VOIDmode, dest, src));
+   if (TARGET_EXPLICIT_RELOCS)
+     {
+       /* compute_frame_size assumes that any function which uses the
+ 	 constant pool will need a gp.  However, all constant
+ 	 pool references could be eliminated, in which case
+ 	 it is OK for flow to delete the gp load as well.  */
+       REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx,
+ 					    REG_NOTES (insn));
+     }
+ }
+ 
  /* Expand the prologue into a bunch of separate insns.  */
  
  void
*************** mips_expand_prologue ()
*** 7834,7860 ****
  
    if (TARGET_ABICALLS && TARGET_NEWABI && cfun->machine->global_pointer > 0)
      {
!       emit_insn (gen_loadgp (XEXP (DECL_RTL (current_function_decl), 0)));
  
        if (!TARGET_EXPLICIT_RELOCS)
  	emit_insn (gen_loadgp_blockage ());
-       else
- 	{
- 	  int i;
- 	  rtx insn;
- 
- 	  /* compute_frame_size assumes that any function which uses the
- 	     constant pool will need a gp.  However, all constant
- 	     pool references could be eliminated, in which case
- 	     it is OK for flow to delete the gp load as well.  */
- 	  insn = get_last_insn ();
- 	  for (i = 0; i < 3; i++)
- 	    {
- 	      REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx,
- 						    REG_NOTES (insn));
- 	      insn = PREV_INSN (insn);
- 	    }
- 	}
      }
  
    /* If we are profiling, make sure no instructions are scheduled before
--- 7856,7875 ----
  
    if (TARGET_ABICALLS && TARGET_NEWABI && cfun->machine->global_pointer > 0)
      {
!       rtx temp, fnsymbol, fnaddr;
! 
!       temp = gen_rtx_REG (Pmode, MIPS_TEMP1_REGNUM);
!       fnsymbol = XEXP (DECL_RTL (current_function_decl), 0);
!       fnaddr = gen_rtx_REG (Pmode, PIC_FUNCTION_ADDR_REGNUM);
! 
!       mips_gp_insn (temp, mips_lui_reloc (fnsymbol, RELOC_LOADGP_HI));
!       mips_gp_insn (temp, gen_rtx_PLUS (Pmode, temp, fnaddr));
!       mips_gp_insn (pic_offset_table_rtx,
! 		    gen_rtx_PLUS (Pmode, temp,
! 				  mips_reloc (fnsymbol, RELOC_LOADGP_LO)));
  
        if (!TARGET_EXPLICIT_RELOCS)
  	emit_insn (gen_loadgp_blockage ());
      }
  
    /* If we are profiling, make sure no instructions are scheduled before
diff --exclude=CVS -cpdr mips.foo/mips.md mips/mips.md
*** mips.foo/mips.md	Thu May 29 11:53:05 2003
--- mips/mips.md	Thu May 29 11:54:09 2003
*************** move\\t%0,%z4\\n\\
*** 6260,6284 ****
     (set_attr "mode"	"SF")
     (set_attr "length"	"4")])
  
- ;; An expander for loading gp in n32/64 PIC.  Operand 0 is the
- ;; function's symbol_ref.
- (define_expand "loadgp"
-   [(set (match_dup 1)
- 	(unspec:DI [(const (unspec [(match_operand 0 "" "")] RELOC_LOADGP_HI))]
- 		   UNSPEC_HIGH))
-    (set (match_dup 1)
- 	(plus:DI (match_dup 1)
- 		 (match_dup 2)))
-    (set (match_dup 3)
- 	(plus:DI (match_dup 1)
- 		 (const (unspec [(match_dup 0)] RELOC_LOADGP_LO))))]
-   ""
-   {
-     operands[1] = gen_rtx_REG (DImode, 3);
-     operands[2] = gen_rtx_REG (DImode, PIC_FUNCTION_ADDR_REGNUM);
-     operands[3] = gen_rtx_REG (DImode, PIC_OFFSET_TABLE_REGNUM);
-   })
- 
  ;; The use of gp is hidden when not using explicit relocations.
  ;; This blockage instruction prevents the gp load from being
  ;; scheduled after an implicit use of gp.  It also prevents
--- 6260,6265 ----


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]