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Patch to fix mips definition of CLASS_MAX_NREGS


CLASS_MAX_NREGS (FP_REGS, mode) was returning 2 for !TARGET_DOUBLE_FLOAT,
regardless of mode's size.  This persuaded reload that it could combine
SFmode and DFmode reloads, generating an invalid (odd-numbered) register
for the SFmode part.

Tested on various mips targets, including mips-sgi-irix6.
Fixes compile/20020415-1.c -O0 for mips-elf.  OK to install?

Richard


	* config/mips/mips.c (mips_class_max_nregs): Return the number of
	words in the mode.

Index: config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.263
diff -c -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.263 mips.c
*** config/mips/mips.c	14 May 2003 07:29:50 -0000	1.263
--- config/mips/mips.c	18 May 2003 17:29:27 -0000
*************** mips_secondary_reload_class (class, mode
*** 9007,9024 ****
    return NO_REGS;
  }
  
! /* This function returns the maximum number of consecutive registers
!    needed to represent mode MODE in registers of class CLASS.  */
  
  int
  mips_class_max_nregs (class, mode)
!      enum reg_class class;
       enum machine_mode mode;
  {
!   if (class == FP_REGS)
!     return FP_INC;
!   else
!     return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  }
  
  bool
--- 8693,8711 ----
    return NO_REGS;
  }
  
! /* Implement CLASS_MAX_NREGS.
! 
!    Usually all registers are word-sized.  The only supported exception
!    is -mgp64 -msingle-float, which has 64-bit words but 32-bit float
!    registers.  A word-based calculation is correct even in that case,
!    since -msingle-float disallows multi-FPR values.  */
  
  int
  mips_class_max_nregs (class, mode)
!      enum reg_class class ATTRIBUTE_UNUSED;
       enum machine_mode mode;
  {
!   return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  }
  
  bool


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