This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Turn machine_dependent_reorg into a target hook


A patch I'm working on needs a version of machine_dependent_reorg
that runs after delayed-branch scheduling.  I guess the new routine
ought to be a target hook so, for consistency, the original mdr
probably ought to be too.  This patch makes it one.

Most of the changes are mechanical.  The only noteworthy thing is
the removal of the "first insn" parameter, which seemed pretty
pointless, and which many targets were already ignoring.  In some
cases (alpha, ia64, pa) this change propagated to subroutines as well.

Tested by building an arbitrary configureation for each processor
and checking that the "before" and "after" compilers generated the
same code and .35.mach dumps for execute/20020615-1.c (picked at
random).  Also built powerpc-eabi to check that a non-mdr target
was unaffected.

Bootstrapped & regression tested on i686-pc-linux-gnu.  OK to install?

BTW, sorry for using a maybe-null target hook.  It seemed like the best
way of avoiding the overhead of mdr on targets that don't need it.

Also, I standardised on foo_reorg as the name of the hook function.
I wasn't sure whether ix86 or x86 was the preferred prefix for i386.

Richard


	* target-def.h (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(TARGET_INITIALIZER): Include it.
	* target.h (struct gcc_target): Add machine_dependent_reorg field.
	* toplev.c (rest_of_compilation): Use targetm.machine_dependent_reorg.

	* config/alpha/alpha-protos.h (alpha_reorg): Remove declaration.
	* config/alpha/alpha.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/alpha/alpha.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(alpha_handle_trap_shadows): Remove "first insn" parameter.
	(alpha_align_insns): Likewise.
	(alpha_reorg): Likewise.  Make static.  Update calls to above
	functions.

	* config/arm/arm-protos.h (arm_reorg): Remove declaration.
	* config/arm/arm.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/arm/arm.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(arm_reorg): Remove parameter.  Make static.

	* config/avr/avr-protos.h (machine_dependent_reorg): Remove.
	* config/avr/avr.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/avr/avr.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(avr_reorg): Renamed from machine_dependent_reorg.  Make static.
	Remove parameter.

	* config/c4x/c4x-protos.h (c4x_process_after_reload): Remove.
	* config/c4x/c4x.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/c4x/c4x.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(c4x_reorg): Renamed from c4x_process_after_reload.  Make static.
	Remove parameter.

	* config/d30v/d30v-protos.h (d30v_machine_dependent_reorg): Remove.
	* config/d30v/d30v.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/d30v/d30v.c (d30v_machine_dependent_reorg): Remove.

	* config/frv/frv-protos.h (frv_machine_dependent_reorg): Remove.
	* config/frv/frv.c: Remove orphaned comment.

	* config/i386/i386-protos.h (x86_machine_dependent_reorg): Remove.
	* config/i386/i386.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/i386/i386.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(ix86_reorg): Renamed from x86_machine_dependent_reorg.  Make static.
	Remove parameter.

	* config/ia64/ia64-protos.h (ia64_reorg): Remove declaration.
	* config/ia64/ia64.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/ia64/ia64.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(emit_insn_group_barriers): Remove "first insn" parameter.
	(emit_all_insn_group_barriers): Likewise.
	(ia64_reorg): Likewise.  Make static.  Update calls to above functions.
	(ia64_output_mi_thunk): Update call to emit_all_insn_group_barriers.

	* config/ip2k/ip2k-protos.h (machine_dependent_reorg): Remove.
	* config/ip2k/ip2k.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/ip2k/ip2k.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(ip2k_reorg): Renamed from machine_dependent_reorg.  Make static.
	Remove parameter.

	* config/m68hc11/m68hc11-protos.h (m68hc11_reorg): Remove declaration.
	* config/m68hc11/m68hc11.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/m68hc11/m68hc11.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(m68hc11_reorg): Make static.  Remove parameter.

	* config/mcore/mcore-protos.h (mcore_dependent_reorg): Remove.
	* config/mcore/mcore.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/mcore/mcore.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(conditionalize_optimization): Remove parameter.
	(mcore_reorg): Renamed from mcore_dependent_reorg.  Remove parameter.
	Make static.  Update call to conditionalize_optimization.

	* config/mips/mips-protos.h (machine_dependent_reorg): Remove.
	* config/mips/mips.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/mips/mips.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(mips_reorg): Renamed from machine_dependent_reorg.  Remove parameter.
	Make static.

	* config/mmix/mmix-protos.h (mmix_machine_dependent_reorg): Remove.
	* config/mmix/mmix.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/mmix/mmix.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(mmix_reorg): Renamed from mmix_machine_dependent_reorg.  Make static.
	Remove parameter.

	* config/pa/pa-protos.h (pa_reorg): Remove declaration.
	* config/pa/pa.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/pa/pa.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(pa_combine_instructions): Remove "first insn" parameter.
	(remove_useless_addtr_insns): Likewise.
	(pa_reorg): Likewise.  Make static.  Update calls to above functions.

	* config/rs6000/rs6000.h (MACHINE_DEPENDENT_REORG): Remove
	commented-out definition.

	* config/s390/s390-protos.h (s390_machine_dependent_reorg): Remove.
	* config/s390/s390.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/s390/s390.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(s390_reorg): Renamed from s390_machine_dependent_reorg.  Make static.
	Remove parameter.

	* config/sh/sh-protos.h (machine_dependent_reorg): Remove.
	* config/sh/sh.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/sh/sh.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(sh_reorg): Renamed from machine_dependent_reorg.  Make static.
	Remove parameter.
	(sh_output_mi_thunk): Call sh_reorg directly.
	* config/sh/sh.md: Update comment.

	* config/stormy16/stormy16.h (MACHINE_DEPENDENT_REORG): Remove
	commented-out definition.

	* config/v850/v850-protos.h (v850_reorg): Remove declaration.
	* config/v850/v850.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/v850/v850.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(v850_reorg): Make static.  Remove parameter.

	* config/xtensa/xtensa-protos.h (xtensa_reorg): Remove declaration.
	* config/xtensa/xtensa.h (MACHINE_DEPENDENT_REORG): Remove.
	* config/xtensa/xtensa.c (TARGET_MACHINE_DEPENDENT_REORG): Define.
	(xtensa_reorg): Make static.  Remove parameter.

	* doc/tm.texi (MACHINE_DEPENDENT_REORG): Remove.
	(TARGET_MACHINE_DEPENDENT_REORG): Document.

Index: target-def.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/target-def.h,v
retrieving revision 1.48
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.48 target-def.h
--- target-def.h	11 Apr 2003 21:15:36 -0000	1.48
+++ target-def.h	13 May 2003 21:05:38 -0000
@@ -283,6 +283,8 @@ #define TARGET_IN_SMALL_DATA_P hook_bool
 #define TARGET_ENCODE_SECTION_INFO default_encode_section_info
 #endif
 
+#define TARGET_MACHINE_DEPENDENT_REORG 0
+
 /* The whole shebang.  */
 #define TARGET_INITIALIZER			\
 {						\
@@ -313,6 +315,7 @@ #define TARGET_INITIALIZER			\
   TARGET_RTX_COSTS,				\
   TARGET_ADDRESS_COST,				\
   TARGET_DWARF_REGISTER_SPAN,                   \
+  TARGET_MACHINE_DEPENDENT_REORG,		\
   TARGET_HAVE_NAMED_SECTIONS,			\
   TARGET_HAVE_CTORS_DTORS,			\
   TARGET_HAVE_TLS,				\
Index: target.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/target.h,v
retrieving revision 1.55
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.55 target.h
--- target.h	28 Apr 2003 20:02:23 -0000	1.55
+++ target.h	13 May 2003 21:05:38 -0000
@@ -341,6 +341,10 @@ struct gcc_target
      hook should return NULL_RTX.  */
   rtx (* dwarf_register_span) PARAMS ((rtx));
 
+  /* Do machine-dependent code transformations.  Called just before
+     delayed-branch scheduling.  */
+  void (* machine_dependent_reorg) PARAMS ((void));
+
   /* Leave the boolean fields at the end.  */
 
   /* True if arbitrary sections are supported.  */
Index: toplev.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/toplev.c,v
retrieving revision 1.754
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.754 toplev.c
--- toplev.c	8 May 2003 00:16:31 -0000	1.754
+++ toplev.c	13 May 2003 21:05:40 -0000
@@ -3651,17 +3651,18 @@ rest_of_compilation (decl)
   free_bb_for_insn ();
 
   /* If a machine dependent reorganization is needed, call it.  */
-#ifdef MACHINE_DEPENDENT_REORG
-  timevar_push (TV_MACH_DEP);
-  open_dump_file (DFI_mach, decl);
+  if (targetm.machine_dependent_reorg != 0)
+    {
+      timevar_push (TV_MACH_DEP);
+      open_dump_file (DFI_mach, decl);
 
-  MACHINE_DEPENDENT_REORG (insns);
+      (*targetm.machine_dependent_reorg) ();
 
-  close_dump_file (DFI_mach, print_rtl, insns);
-  timevar_pop (TV_MACH_DEP);
+      close_dump_file (DFI_mach, print_rtl, insns);
+      timevar_pop (TV_MACH_DEP);
 
-  ggc_collect ();
-#endif
+      ggc_collect ();
+    }
 
   purge_line_number_notes (insns);
   cleanup_barriers ();
Index: config/alpha/alpha-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha-protos.h,v
retrieving revision 1.44
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.44 alpha-protos.h
--- config/alpha/alpha-protos.h	14 Mar 2003 17:58:48 -0000	1.44
+++ config/alpha/alpha-protos.h	13 May 2003 21:05:40 -0000
@@ -134,7 +134,6 @@ extern rtx alpha_gp_save_rtx PARAMS ((vo
 extern void print_operand PARAMS ((FILE *, rtx, int));
 extern void print_operand_address PARAMS ((FILE *, rtx));
 extern void alpha_initialize_trampoline PARAMS ((rtx, rtx, rtx, int, int, int));
-extern void alpha_reorg PARAMS ((rtx));
 
 extern tree alpha_build_va_list PARAMS ((void));
 extern void alpha_setup_incoming_varargs
Index: config/alpha/alpha.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.c,v
retrieving revision 1.304
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.304 alpha.c
--- config/alpha/alpha.c	10 May 2003 02:05:36 -0000	1.304
+++ config/alpha/alpha.c	13 May 2003 21:05:42 -0000
@@ -240,6 +240,8 @@ static int alpha_use_dfa_pipeline_interf
   PARAMS ((void));
 static int alpha_multipass_dfa_lookahead
   PARAMS ((void));
+static void alpha_reorg
+  PARAMS ((void));
 
 #ifdef OBJECT_FORMAT_ELF
 static void alpha_elf_select_rtx_section
@@ -370,6 +372,9 @@ #define TARGET_RTX_COSTS alpha_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_0
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG alpha_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Parse target option strings.  */
@@ -8272,7 +8277,7 @@ struct shadow_summary
 };
 
 static void summarize_insn PARAMS ((rtx, struct shadow_summary *, int));
-static void alpha_handle_trap_shadows PARAMS ((rtx));
+static void alpha_handle_trap_shadows PARAMS ((void));
 
 /* Summary the effects of expression X on the machine.  Update SUM, a pointer
    to the summary structure.  SET is nonzero if the insn is setting the
@@ -8436,8 +8441,7 @@ summarize_insn (x, sum, set)
    (d) The trap shadow may not include any branch instructions.  */
 
 static void
-alpha_handle_trap_shadows (insns)
-     rtx insns;
+alpha_handle_trap_shadows ()
 {
   struct shadow_summary shadow;
   int trap_pending, exception_nesting;
@@ -8450,7 +8454,7 @@ alpha_handle_trap_shadows (insns)
   shadow.used.mem = 0;
   shadow.defd = shadow.used;
   
-  for (i = insns; i ; i = NEXT_INSN (i))
+  for (i = get_insns (); i ; i = NEXT_INSN (i))
     {
       if (GET_CODE (i) == NOTE)
 	{
@@ -8598,7 +8602,7 @@ static rtx alphaev4_next_nop PARAMS ((in
 static rtx alphaev5_next_nop PARAMS ((int *));
 
 static void alpha_align_insns
-  PARAMS ((rtx, unsigned int, rtx (*)(rtx, int *, int *), rtx (*)(int *)));
+  PARAMS ((unsigned int, rtx (*)(rtx, int *, int *), rtx (*)(int *)));
 
 static enum alphaev4_pipe
 alphaev4_insn_pipe (insn)
@@ -8987,8 +8991,7 @@ alphaev5_next_nop (pin_use)
 /* The instruction group alignment main loop.  */
 
 static void
-alpha_align_insns (insns, max_align, next_group, next_nop)
-     rtx insns;
+alpha_align_insns (max_align, next_group, next_nop)
      unsigned int max_align;
      rtx (*next_group) PARAMS ((rtx, int *, int *));
      rtx (*next_nop) PARAMS ((int *));
@@ -9001,7 +9004,7 @@ alpha_align_insns (insns, max_align, nex
   rtx i, next;
 
   /* Let shorten branches care for assigning alignments to code labels.  */
-  shorten_branches (insns);
+  shorten_branches (get_insns ());
 
   if (align_functions < 4)
     align = 4;
@@ -9011,7 +9014,7 @@ alpha_align_insns (insns, max_align, nex
     align = max_align;
 
   ofs = prev_in_use = 0;
-  i = insns;
+  i = get_insns ();
   if (GET_CODE (i) == NOTE)
     i = next_nonnote_insn (i);
 
@@ -9113,12 +9116,11 @@ alpha_align_insns (insns, max_align, nex
 
 /* Machine dependent reorg pass.  */
 
-void
-alpha_reorg (insns)
-     rtx insns;
+static void
+alpha_reorg ()
 {
   if (alpha_tp != ALPHA_TP_PROG || flag_exceptions)
-    alpha_handle_trap_shadows (insns);
+    alpha_handle_trap_shadows ();
 
   /* Due to the number of extra trapb insns, don't bother fixing up
      alignment when trap precision is instruction.  Moreover, we can
@@ -9128,9 +9130,9 @@ alpha_reorg (insns)
       && flag_schedule_insns_after_reload)
     {
       if (alpha_cpu == PROCESSOR_EV4)
-	alpha_align_insns (insns, 8, alphaev4_next_group, alphaev4_next_nop);
+	alpha_align_insns (8, alphaev4_next_group, alphaev4_next_nop);
       else if (alpha_cpu == PROCESSOR_EV5)
-	alpha_align_insns (insns, 16, alphaev5_next_group, alphaev5_next_nop);
+	alpha_align_insns (16, alphaev5_next_group, alphaev5_next_nop);
     }
 }
 
Index: config/alpha/alpha.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.h,v
retrieving revision 1.195
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.195 alpha.h
--- config/alpha/alpha.h	17 Apr 2003 23:18:53 -0000	1.195
+++ config/alpha/alpha.h	13 May 2003 21:05:42 -0000
@@ -1356,9 +1356,6 @@ do {									     \
 
 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)  \
 { if (GET_CODE (ADDR) == AND) goto LABEL; }
-
-/* Machine-dependent reorg pass.  */
-#define MACHINE_DEPENDENT_REORG(X)	alpha_reorg(X)
 
 /* Specify the machine mode that this machine uses
    for the index in the tablejump instruction.  */
Index: config/arm/arm-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm-protos.h,v
retrieving revision 1.53
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.53 arm-protos.h
--- config/arm/arm-protos.h	10 May 2003 13:10:47 -0000	1.53
+++ config/arm/arm-protos.h	13 May 2003 21:05:43 -0000
@@ -123,7 +123,6 @@ extern rtx    arm_gen_compare_reg	PARAMS
 extern rtx    arm_gen_return_addr_mask	PARAMS ((void));
 extern void   arm_reload_in_hi		PARAMS ((rtx *));
 extern void   arm_reload_out_hi		PARAMS ((rtx *));
-extern void   arm_reorg			PARAMS ((rtx));
 extern const char * fp_immediate_constant PARAMS ((rtx));
 extern const char * output_call		PARAMS ((rtx *));
 extern const char * output_call_mem	PARAMS ((rtx *));
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.271
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.271 arm.c
--- config/arm/arm.c	10 May 2003 13:10:46 -0000	1.271
+++ config/arm/arm.c	13 May 2003 21:05:46 -0000
@@ -112,6 +112,7 @@ static int	 arm_barrier_cost		PARAMS ((r
 static Mfix *    create_fix_barrier		PARAMS ((Mfix *, Hint));
 static void	 push_minipool_barrier	        PARAMS ((rtx, Hint));
 static void	 push_minipool_fix		PARAMS ((rtx, Hint, rtx *, Mmode, rtx));
+static void	 arm_reorg			PARAMS ((void));
 static bool	 note_invalid_constants	        PARAMS ((rtx, Hint, int));
 static int       current_file_function_operand	PARAMS ((rtx));
 static Ulong	 arm_compute_save_reg0_reg12_mask  PARAMS ((void));
@@ -218,6 +219,9 @@ #define TARGET_RTX_COSTS arm_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST arm_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG arm_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Obstack for minipool constant handling.  */
@@ -2838,13 +2842,13 @@ thumb_legitimate_address_p (mode, x, str
   else if (thumb_base_register_rtx_p (x, mode, strict_p))
     return 1;
 
-  /* This is PC relative data before MACHINE_DEPENDENT_REORG runs.  */
+  /* This is PC relative data before arm_reorg runs.  */
   else if (GET_MODE_SIZE (mode) >= 4 && CONSTANT_P (x)
 	   && GET_CODE (x) == SYMBOL_REF
            && CONSTANT_POOL_ADDRESS_P (x) && ! flag_pic)
     return 1;
 
-  /* This is PC relative data after MACHINE_DEPENDENT_REORG runs.  */
+  /* This is PC relative data after arm_reorg runs.  */
   else if (GET_MODE_SIZE (mode) >= 4 && reload_completed
 	   && (GET_CODE (x) == LABEL_REF
 	       || (GET_CODE (x) == CONST
@@ -6977,9 +6981,13 @@ note_invalid_constants (insn, address, d
   return result;
 }
 
-void
-arm_reorg (first)
-     rtx first;
+/* Gcc puts the pool in the wrong place for ARM, since we can only
+   load addresses a limited distance around the pc.  We do some
+   special munging to move the constant pool values to the correct
+   point in the code.  */
+
+static void
+arm_reorg ()
 {
   rtx insn;
   HOST_WIDE_INT address = 0;
@@ -6989,11 +6997,12 @@ arm_reorg (first)
 
   /* The first insn must always be a note, or the code below won't
      scan it properly.  */
-  if (GET_CODE (first) != NOTE)
+  insn = get_insns ();
+  if (GET_CODE (insn) != NOTE)
     abort ();
 
   /* Scan all the insns and record the operands that will need fixing.  */
-  for (insn = next_nonnote_insn (first); insn; insn = next_nonnote_insn (insn))
+  for (insn = next_nonnote_insn (insn); insn; insn = next_nonnote_insn (insn))
     {
       if (TARGET_CIRRUS_FIX_INVALID_INSNS
           && (arm_cirrus_insn_p (insn)
Index: config/arm/arm.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.189
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.189 arm.h
--- config/arm/arm.h	23 Apr 2003 16:39:30 -0000	1.189
+++ config/arm/arm.h	13 May 2003 21:05:47 -0000
@@ -2242,14 +2242,6 @@ #define STORE_FLAG_VALUE 1
 /* The arm5 clz instruction returns 32.  */
 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  ((VALUE) = 32, 1)
 
-
-/* Gcc puts the pool in the wrong place for ARM, since we can only
-   load addresses a limited distance around the pc.  We do some
-   special munging to move the constant pool values to the correct
-   point in the code.  */
-#define MACHINE_DEPENDENT_REORG(INSN)	\
-    arm_reorg (INSN);			\
-
 #undef  ASM_APP_OFF
 #define ASM_APP_OFF (TARGET_THUMB ? "\t.code\t16\n" : "")
 
Index: config/avr/avr-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr-protos.h,v
retrieving revision 1.25
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.25 avr-protos.h
--- config/avr/avr-protos.h	19 Feb 2003 18:03:09 -0000	1.25
+++ config/avr/avr-protos.h	13 May 2003 21:05:47 -0000
@@ -71,7 +71,6 @@ extern void   function_arg_advance PARAM
 extern void   asm_output_external_libcall PARAMS ((FILE *file, rtx symref));
 extern int    legitimate_address_p    PARAMS ((enum machine_mode mode, rtx x,
 					int strict));
-extern void   machine_dependent_reorg PARAMS ((rtx first_insn));
 extern int    compare_diff_p  PARAMS ((rtx insn));
 extern const char * output_movqi    PARAMS ((rtx insn, rtx operands[], int *l));
 extern const char * output_movhi    PARAMS ((rtx insn, rtx operands[], int *l));
Index: config/avr/avr.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.c,v
retrieving revision 1.91
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.91 avr.c
--- config/avr/avr.c	17 Apr 2003 04:52:57 -0000	1.91
+++ config/avr/avr.c	13 May 2003 21:05:48 -0000
@@ -69,6 +69,7 @@ static void   avr_unique_section PARAMS 
 static void   avr_insert_attributes PARAMS ((tree, tree *));
 static unsigned int avr_section_type_flags PARAMS ((tree, const char *, int));
 
+static void avr_reorg PARAMS ((void));
 static void   avr_asm_out_ctor PARAMS ((rtx, int));
 static void   avr_asm_out_dtor PARAMS ((rtx, int));
 static int default_rtx_costs PARAMS ((rtx, enum rtx_code, enum rtx_code));
@@ -234,6 +235,8 @@ #define TARGET_SECTION_TYPE_FLAGS avr_se
 #define TARGET_RTX_COSTS avr_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST avr_address_cost
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
@@ -5187,13 +5190,12 @@ avr_normalize_condition (condition)
 
 /* This fnction optimizes conditional jumps */
 
-void
-machine_dependent_reorg (first_insn)
-     rtx first_insn;
+static void
+avr_reorg ()
 {
   rtx insn, pattern;
   
-  for (insn = first_insn; insn; insn = NEXT_INSN (insn))
+  for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       if (! (GET_CODE (insn) == INSN
 	     || GET_CODE (insn) == CALL_INSN
Index: config/avr/avr.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.h,v
retrieving revision 1.77
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.77 avr.h
--- config/avr/avr.h	17 Apr 2003 23:18:54 -0000	1.77
+++ config/avr/avr.h	13 May 2003 21:05:49 -0000
@@ -2289,12 +2289,6 @@ #define NO_DOLLAR_IN_LABEL 1
    G++ have `$' in the identifiers.  If this macro is defined, `.' is
    used instead.  */
 
-#define MACHINE_DEPENDENT_REORG(INSN) machine_dependent_reorg (INSN)
-/* In rare cases, correct code generation requires extra machine
-   dependent processing between the second jump optimization pass and
-   delayed branch scheduling.  On those machines, define this macro
-   as a C statement to act on the code starting at INSN.  */
-
 #define GIV_SORT_CRITERION(X, Y)	\
   if (GET_CODE ((X)->add_val) == CONST_INT		\
       && GET_CODE ((Y)->add_val) == CONST_INT)		\
Index: config/c4x/c4x-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x-protos.h,v
retrieving revision 1.31
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.31 c4x-protos.h
--- config/c4x/c4x-protos.h	13 Mar 2003 04:06:49 -0000	1.31
+++ config/c4x/c4x-protos.h	13 May 2003 21:05:49 -0000
@@ -97,8 +97,6 @@ extern int c4x_label_conflict PARAMS ((r
 
 extern int c4x_address_conflict PARAMS ((rtx, rtx, int, int));
 
-extern void c4x_process_after_reload PARAMS ((rtx));
-
 extern void c4x_rptb_insert PARAMS ((rtx insn));
 
 extern int c4x_rptb_nop_p PARAMS ((rtx));
Index: config/c4x/c4x.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.c,v
retrieving revision 1.124
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.124 c4x.c
--- config/c4x/c4x.c	17 Apr 2003 05:08:01 -0000	1.124
+++ config/c4x/c4x.c	13 May 2003 21:05:50 -0000
@@ -189,6 +189,7 @@ static int c4x_arn_mem_operand PARAMS ((
 static void c4x_check_attribute PARAMS ((const char *, tree, tree, tree *));
 static int c4x_r11_set_p PARAMS ((rtx));
 static int c4x_rptb_valid_p PARAMS ((rtx, rtx));
+static void c4x_reorg PARAMS ((void));
 static int c4x_label_ref_used_p PARAMS ((rtx, rtx));
 static tree c4x_handle_fntype_attribute PARAMS ((tree *, tree, tree, int, bool *));
 const struct attribute_spec c4x_attribute_table[];
@@ -230,6 +231,9 @@ #define TARGET_RTX_COSTS c4x_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST c4x_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG c4x_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Override command line options.
@@ -2424,17 +2428,22 @@ c4x_rptb_insert (insn)
 }
 
 
-/* This function is a C4x special called immediately before delayed
-   branch scheduling.  We fix up RTPB style loops that didn't get RC
+/* We need to use direct addressing for large constants and addresses
+   that cannot fit within an instruction.  We must check for these
+   after after the final jump optimisation pass, since this may
+   introduce a local_move insn for a SYMBOL_REF.  This pass
+   must come before delayed branch slot filling since it can generate
+   additional instructions.
+
+   This function also fixes up RTPB style loops that didn't get RC
    allocated as the loop counter.  */
 
-void
-c4x_process_after_reload (first)
-     rtx first;
+static void
+c4x_reorg ()
 {
   rtx insn;
 
-  for (insn = first; insn; insn = NEXT_INSN (insn))
+  for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       /* Look for insn.  */
       if (INSN_P (insn))
Index: config/c4x/c4x.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.h,v
retrieving revision 1.127
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.127 c4x.h
--- config/c4x/c4x.h	29 Apr 2003 14:16:45 -0000	1.127
+++ config/c4x/c4x.h	13 May 2003 21:05:50 -0000
@@ -1954,15 +1954,6 @@ #define ASM_OUTPUT_REG_POP(FILE, REGNO) 
 
 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 
-/* We need to use direct addressing for large constants and addresses
-   that cannot fit within an instruction.  We must check for these
-   after after the final jump optimisation pass, since this may
-   introduce a local_move insn for a SYMBOL_REF.  This pass
-   must come before delayed branch slot filling since it can generate
-   additional instructions.  */
-
-#define MACHINE_DEPENDENT_REORG(INSNS) c4x_process_after_reload(INSNS)
-
 #define DBR_OUTPUT_SEQEND(FILE)				\
 if (final_sequence != NULL_RTX)				\
 {							\
Index: config/d30v/d30v-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v-protos.h,v
retrieving revision 1.10
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.10 d30v-protos.h
--- config/d30v/d30v-protos.h	19 Feb 2003 18:03:09 -0000	1.10
+++ config/d30v/d30v-protos.h	13 May 2003 21:05:50 -0000
@@ -128,7 +128,6 @@ extern int d30v_mode_dependent_address_p
 extern rtx d30v_emit_comparison		PARAMS ((int, rtx, rtx, rtx));
 extern const char *d30v_move_2words	PARAMS ((rtx *, rtx));
 extern int d30v_emit_cond_move		PARAMS ((rtx, rtx, rtx, rtx));
-extern void d30v_machine_dependent_reorg PARAMS ((rtx));
 extern rtx d30v_return_addr		PARAMS ((void));
 #endif
 extern void d30v_init_expanders		PARAMS ((void));
Index: config/d30v/d30v.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v.c,v
retrieving revision 1.30
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.30 d30v.c
--- config/d30v/d30v.c	25 Feb 2003 10:55:45 -0000	1.30
+++ config/d30v/d30v.c	13 May 2003 21:05:52 -0000
@@ -3423,18 +3423,6 @@ d30v_emit_cond_move (dest, test, true_va
 }
 
 
-/* In rare cases, correct code generation requires extra machine dependent
-   processing between the second jump optimization pass and delayed branch
-   scheduling.  On those machines, define this macro as a C statement to act on
-   the code starting at INSN.  */
-
-void
-d30v_machine_dependent_reorg (insn)
-     rtx insn ATTRIBUTE_UNUSED;
-{
-}
-
-
 /* A C statement (sans semicolon) to update the integer variable COST based on
    the relationship between INSN that is dependent on DEP_INSN through the
    dependence LINK.  The default is to make no adjustment to COST.  This can be
Index: config/d30v/d30v.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v.h,v
retrieving revision 1.80
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.80 d30v.h
--- config/d30v/d30v.h	17 Apr 2003 23:18:55 -0000	1.80
+++ config/d30v/d30v.h	13 May 2003 21:05:53 -0000
@@ -4155,12 +4155,6 @@ #define HANDLE_SYSV_PRAGMA 1
    You need not define this macro if it would always return zero.  */
 /* #define INSN_REFERENCES_ARE_DELAYED(INSN) */
 
-/* In rare cases, correct code generation requires extra machine dependent
-   processing between the second jump optimization pass and delayed branch
-   scheduling.  On those machines, define this macro as a C statement to act on
-   the code starting at INSN.  */
-#define MACHINE_DEPENDENT_REORG(INSN) d30v_machine_dependent_reorg (INSN)
-
 /* Define this macro if in some cases global symbols from one translation unit
    may not be bound to undefined symbols in another translation unit without
    user intervention.  For instance, under Microsoft Windows symbols must be
Index: config/frv/frv-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv-protos.h,v
retrieving revision 1.5
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.5 frv-protos.h
--- config/frv/frv-protos.h	19 Feb 2003 18:03:09 -0000	1.5
+++ config/frv/frv-protos.h	13 May 2003 21:05:54 -0000
@@ -242,6 +242,5 @@ extern int even_acc_operand		PARAMS ((rt
 extern int quad_acc_operand		PARAMS ((rtx, enum machine_mode));
 extern int accg_operand			PARAMS ((rtx, enum machine_mode));
 extern rtx frv_matching_accg_for_acc	PARAMS ((rtx));
-extern void frv_machine_dependent_reorg	PARAMS ((rtx));
 #endif
 
Index: config/frv/frv.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.c,v
retrieving revision 1.20
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.20 frv.c
--- config/frv/frv.c	17 Apr 2003 06:50:00 -0000	1.20
+++ config/frv/frv.c	14 May 2003 06:20:36 -0000
@@ -8609,11 +8609,6 @@ frv_registers_set_p (x, reg_state, modif
 }
 
 
-/* In rare cases, correct code generation requires extra machine dependent
-   processing between the second jump optimization pass and delayed branch
-   scheduling.  On those machines, define this macro as a C statement to act on
-   the code starting at INSN.  */
-
 /* On the FR-V, this pass is used to rescan the insn chain, and pack
    conditional branches/calls/jumps, etc. with previous insns where it can.  It
    does not reorder the instructions.  We assume the scheduler left the flow
Index: config/i386/i386-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386-protos.h,v
retrieving revision 1.96
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.96 i386-protos.h
--- config/i386/i386-protos.h	20 Apr 2003 18:20:37 -0000	1.96
+++ config/i386/i386-protos.h	13 May 2003 21:05:54 -0000
@@ -225,7 +225,6 @@ extern int x86_field_alignment PARAMS ((
 #endif
 
 extern rtx ix86_tls_get_addr PARAMS ((void));
-extern void x86_machine_dependent_reorg PARAMS ((rtx));
 extern bool ix86_must_pass_in_stack PARAMS ((enum machine_mode mode, tree));
 
 /* In winnt.c  */
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.563
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.563 i386.c
--- config/i386/i386.c	8 May 2003 00:51:15 -0000	1.563
+++ config/i386/i386.c	13 May 2003 21:05:56 -0000
@@ -828,6 +828,7 @@ static void x86_output_mi_thunk PARAMS (
 					 HOST_WIDE_INT, tree));
 static bool x86_can_output_mi_thunk PARAMS ((tree, HOST_WIDE_INT,
 					     HOST_WIDE_INT, tree));
+static void ix86_reorg PARAMS ((void));
 bool ix86_expand_carry_flag_compare PARAMS ((enum rtx_code, rtx, rtx, rtx*));
 
 struct ix86_address
@@ -1006,6 +1007,9 @@ #define TARGET_RTX_COSTS ix86_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST ix86_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG ix86_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* The svr4 ABI for the i386 says that records and unions are returned
@@ -15531,9 +15535,8 @@ x86_function_profiler (file, labelno)
    when RET is not destination of conditional jump or directly preceded
    by other jump instruction.  We avoid the penalty by inserting NOP just
    before the RET instructions in such cases.  */
-void
-x86_machine_dependent_reorg (first)
-     rtx first ATTRIBUTE_UNUSED;
+static void
+ix86_reorg ()
 {
   edge e;
 
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.335
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.335 i386.h
--- config/i386/i386.h	10 May 2003 19:38:02 -0000	1.335
+++ config/i386/i386.h	13 May 2003 21:05:58 -0000
@@ -3194,8 +3194,6 @@ #define HARD_REGNO_RENAME_OK(SRC, TARGET
    ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)
 
 
-#define MACHINE_DEPENDENT_REORG(X) x86_machine_dependent_reorg(X)
-
 #define DLL_IMPORT_EXPORT_PREFIX '#'
 
 #define FASTCALL_PREFIX '@'
Index: config/ia64/ia64-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64-protos.h,v
retrieving revision 1.56
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.56 ia64-protos.h
--- config/ia64/ia64-protos.h	10 Apr 2003 19:53:54 -0000	1.56
+++ config/ia64/ia64-protos.h	13 May 2003 21:05:58 -0000
@@ -101,7 +101,6 @@ extern enum reg_class ia64_secondary_rel
 							  enum machine_mode,
 							  rtx));
 extern void ia64_output_dwarf_dtprel PARAMS ((FILE*, int, rtx));
-extern void ia64_reorg PARAMS((rtx));
 extern void process_for_unwind_directive PARAMS ((FILE *, rtx));
 extern const char *get_bundle_name PARAMS ((int));
 #endif /* RTX_CODE */
Index: config/ia64/ia64.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.c,v
retrieving revision 1.222
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.222 ia64.c
--- config/ia64/ia64.c	25 Apr 2003 22:09:12 -0000	1.222
+++ config/ia64/ia64.c	13 May 2003 21:06:00 -0000
@@ -185,10 +185,11 @@ static bool ia64_function_ok_for_sibcall
 static bool ia64_rtx_costs PARAMS ((rtx, int, int, int *));
 static void fix_range PARAMS ((const char *));
 static struct machine_function * ia64_init_machine_status PARAMS ((void));
-static void emit_insn_group_barriers PARAMS ((FILE *, rtx));
-static void emit_all_insn_group_barriers PARAMS ((FILE *, rtx));
+static void emit_insn_group_barriers PARAMS ((FILE *));
+static void emit_all_insn_group_barriers PARAMS ((FILE *));
 static void final_emit_insn_group_barriers PARAMS ((FILE *));
 static void emit_predicate_relation_info PARAMS ((void));
+static void ia64_reorg PARAMS ((void));
 static bool ia64_in_small_data_p PARAMS ((tree));
 static void process_epilogue PARAMS ((void));
 static int process_set PARAMS ((FILE *, rtx));
@@ -356,6 +357,9 @@ #define TARGET_RTX_COSTS ia64_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_0
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG ia64_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Return 1 if OP is a valid operand for the MEM of a CALL insn.  */
@@ -5357,17 +5361,16 @@ safe_group_barrier_needed_p (insn)
   return t;
 }
 
-/* INSNS is a chain of instructions.  Scan the chain, and insert stop bits
-   as necessary to eliminate dependencies.  This function assumes that
-   a final instruction scheduling pass has been run which has already
-   inserted most of the necessary stop bits.  This function only inserts
-   new ones at basic block boundaries, since these are invisible to the
-   scheduler.  */
+/* Scan the current function and insert stop bits as necessary to
+   eliminate dependencies.  This function assumes that a final
+   instruction scheduling pass has been run which has already
+   inserted most of the necessary stop bits.  This function only
+   inserts new ones at basic block boundaries, since these are
+   invisible to the scheduler.  */
 
 static void
-emit_insn_group_barriers (dump, insns)
+emit_insn_group_barriers (dump)
      FILE *dump;
-     rtx insns;
 {
   rtx insn;
   rtx last_label = 0;
@@ -5375,7 +5378,7 @@ emit_insn_group_barriers (dump, insns)
 
   init_insn_group_barriers ();
 
-  for (insn = insns; insn; insn = NEXT_INSN (insn))
+  for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       if (GET_CODE (insn) == CODE_LABEL)
 	{
@@ -5423,15 +5426,14 @@ emit_insn_group_barriers (dump, insns)
    This function has to emit all necessary group barriers.  */
 
 static void
-emit_all_insn_group_barriers (dump, insns)
+emit_all_insn_group_barriers (dump)
      FILE *dump ATTRIBUTE_UNUSED;
-     rtx insns;
 {
   rtx insn;
 
   init_insn_group_barriers ();
 
-  for (insn = insns; insn; insn = NEXT_INSN (insn))
+  for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       if (GET_CODE (insn) == BARRIER)
 	{
@@ -7181,9 +7183,8 @@ emit_predicate_relation_info ()
 
 /* Perform machine dependent operations on the rtl chain INSNS.  */
 
-void
-ia64_reorg (insns)
-     rtx insns;
+static void
+ia64_reorg ()
 {
   /* We are freeing block_for_insn in the toplev to keep compatibility
      with old MDEP_REORGS that are not CFG based.  Recompute it now.  */
@@ -7282,13 +7283,13 @@ ia64_reorg (insns)
 	  free (clocks);
 	}
       free (stops_p);
-      emit_insn_group_barriers (rtl_dump_file, insns);
+      emit_insn_group_barriers (rtl_dump_file);
 
       ia64_final_schedule = 0;
       timevar_pop (TV_SCHED2);
     }
   else
-    emit_all_insn_group_barriers (rtl_dump_file, insns);
+    emit_all_insn_group_barriers (rtl_dump_file);
 
   /* A call must not be the last instruction in a function, so that the
      return address is still within the function, so that unwinding works
@@ -8527,8 +8528,8 @@ ia64_output_mi_thunk (file, thunk, delta
      instruction scheduling worth while.  Note that use_thunk calls
      assemble_start_function and assemble_end_function.  */
 
+  emit_all_insn_group_barriers (NULL);
   insn = get_insns ();
-  emit_all_insn_group_barriers (NULL, insn);
   shorten_branches (insn);
   final_start_function (insn, file, 1);
   final (insn, file, 1, 0);
Index: config/ia64/ia64.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.h,v
retrieving revision 1.149
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.149 ia64.h
--- config/ia64/ia64.h	17 Apr 2003 23:18:56 -0000	1.149
+++ config/ia64/ia64.h	13 May 2003 21:06:00 -0000
@@ -2300,13 +2300,6 @@ #define PREFETCH_BLOCK 32
 
 #define HANDLE_SYSV_PRAGMA 1
 
-/* In rare cases, correct code generation requires extra machine dependent
-   processing between the second jump optimization pass and delayed branch
-   scheduling.  On those machines, define this macro as a C statement to act on
-   the code starting at INSN.  */
-
-#define MACHINE_DEPENDENT_REORG(INSN) ia64_reorg (INSN)
-
 /* A C expression for the maximum number of instructions to execute via
    conditional execution instructions instead of a branch.  A value of
    BRANCH_COST+1 is the default if the machine does not use
Index: config/ip2k/ip2k-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/ip2k-protos.h,v
retrieving revision 1.5
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.5 ip2k-protos.h
--- config/ip2k/ip2k-protos.h	17 Apr 2003 07:39:56 -0000	1.5
+++ config/ip2k/ip2k-protos.h	13 May 2003 21:06:01 -0000
@@ -37,7 +37,6 @@ extern int ip2k_return_pops_args PARAMS 
 
 #ifdef RTX_CODE
 extern int legitimate_address_p PARAMS ((enum machine_mode, rtx, int));
-extern void machine_dependent_reorg PARAMS ((rtx));
 extern int ip2k_extra_constraint PARAMS ((rtx, int));
 extern rtx legitimize_address PARAMS ((rtx, rtx, enum machine_mode, rtx));
 extern int adjust_insn_length PARAMS ((rtx insn, int len));
Index: config/ip2k/ip2k.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/ip2k.c,v
retrieving revision 1.18
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.18 ip2k.c
--- config/ip2k/ip2k.c	17 Apr 2003 07:39:56 -0000	1.18
+++ config/ip2k/ip2k.c	13 May 2003 21:06:02 -0000
@@ -71,6 +71,7 @@ static void mdr_try_remove_redundant_ins
 static int track_w_reload PARAMS ((rtx, rtx *, int , int));
 static void mdr_try_wreg_elim PARAMS ((rtx));
 #endif /* IP2K_MD_REORG_PASS */
+static void ip2k_reorg PARAMS ((void));
 static int ip2k_check_can_adjust_stack_ref PARAMS ((rtx, int));
 static void ip2k_adjust_stack_ref PARAMS ((rtx *, int));
 static int ip2k_xexp_not_uses_reg_for_mem PARAMS ((rtx, unsigned int));
@@ -105,6 +106,9 @@ #define TARGET_RTX_COSTS ip2k_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST ip2k_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG ip2k_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Commands in the functions prologues in the compiled file.  */
@@ -5340,12 +5344,11 @@ mdr_try_wreg_elim (first_insn)
    earlier passes to be re-run as it progressively transforms things,
    making the subsequent runs continue to win.  */
 
-void
-machine_dependent_reorg (first_insn)
-     rtx first_insn ATTRIBUTE_UNUSED;
+static void
+ip2k_reorg ()
 {
 #ifdef IP2K_MD_REORG_PASS
-  rtx insn, set;
+  rtx first_insn, insn, set;
 #endif
 
   CC_STATUS_INIT;
@@ -5373,6 +5376,8 @@ machine_dependent_reorg (first_insn)
   
   ip2k_reorg_in_progress = 1;
   
+  first_insn = get_insns ();
+
   /* Look for size effects of earlier optimizations - in particular look for
      situations where we're saying "use" a register on one hand but immediately
      tagging it as "REG_DEAD" at the same time!  Seems like a bug in core-gcc
Index: config/ip2k/ip2k.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/ip2k.h,v
retrieving revision 1.20
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.20 ip2k.h
--- config/ip2k/ip2k.h	9 Mar 2003 22:01:14 -0000	1.20
+++ config/ip2k/ip2k.h	13 May 2003 21:06:03 -0000
@@ -2242,12 +2242,6 @@ #define DOLLARS_IN_IDENTIFIERS 0
    in that case.  This macro controls the compiler proper; it does
    not affect the preprocessor.  */
 
-#define MACHINE_DEPENDENT_REORG(INSN) machine_dependent_reorg (INSN)
-/* In rare cases, correct code generation requires extra machine
-   dependent processing between the second jump optimization pass and
-   delayed branch scheduling.  On those machines, define this macro
-   as a C statement to act on the code starting at INSN.  */
-
 extern int ip2k_reorg_in_progress;
 /* Flag if we're in the middle of IP2k-specific reorganization.  */
 
Index: config/m68hc11/m68hc11-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68hc11/m68hc11-protos.h,v
retrieving revision 1.26
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.26 m68hc11-protos.h
--- config/m68hc11/m68hc11-protos.h	12 Apr 2003 21:52:33 -0000	1.26
+++ config/m68hc11/m68hc11-protos.h	13 May 2003 21:06:03 -0000
@@ -58,8 +58,6 @@ extern int m68hc11_legitimize_address PA
 extern void m68hc11_notice_update_cc PARAMS((rtx, rtx));
 extern void m68hc11_notice_keep_cc PARAMS((rtx));
 
-extern void m68hc11_reorg PARAMS((rtx));
-
 extern void m68hc11_gen_movqi PARAMS((rtx, rtx*));
 extern void m68hc11_gen_movhi PARAMS((rtx, rtx*));
 extern void m68hc11_gen_rotate PARAMS((enum rtx_code, rtx, rtx*));
Index: config/m68hc11/m68hc11.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68hc11/m68hc11.c,v
retrieving revision 1.76
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.76 m68hc11.c
--- config/m68hc11/m68hc11.c	20 Apr 2003 18:20:37 -0000	1.76
+++ config/m68hc11/m68hc11.c	13 May 2003 21:06:04 -0000
@@ -62,6 +62,7 @@ static void print_options PARAMS ((FILE 
 static void emit_move_after_reload PARAMS ((rtx, rtx, rtx));
 static rtx simplify_logical PARAMS ((enum machine_mode, int, rtx, rtx *));
 static void m68hc11_emit_logical PARAMS ((enum machine_mode, int, rtx *));
+static void m68hc11_reorg PARAMS ((void));
 static int go_if_legitimate_address_internal PARAMS((rtx, enum machine_mode,
                                                      int));
 static int register_indirect_p PARAMS((rtx, enum machine_mode, int));
@@ -237,6 +238,9 @@ #define TARGET_RTX_COSTS m68hc11_rtx_cos
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST m68hc11_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG m68hc11_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 int
@@ -5184,15 +5188,23 @@ m68hc11_reassign_regs (first)
 }
 
 
-void
-m68hc11_reorg (first)
-     rtx first;
+/* Machine-dependent reorg pass.
+   Specific optimizations are defined here:
+    - this pass changes the Z register into either X or Y
+      (it preserves X/Y previous values in a memory slot in page0).
+
+   When this pass is finished, the global variable
+   'z_replacement_completed' is set to 2.  */
+
+static void
+m68hc11_reorg ()
 {
   int split_done = 0;
-  rtx insn;
+  rtx insn, first;
 
   z_replacement_completed = 0;
   z_reg = gen_rtx (REG, HImode, HARD_Z_REGNUM);
+  first = get_insns ();
 
   /* Some RTX are shared at this point.  This breaks the Z register
      replacement, unshare everything.  */
Index: config/m68hc11/m68hc11.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68hc11/m68hc11.h,v
retrieving revision 1.72
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.72 m68hc11.h
--- config/m68hc11/m68hc11.h	17 Apr 2003 23:18:56 -0000	1.72
+++ config/m68hc11/m68hc11.h	13 May 2003 21:06:04 -0000
@@ -1709,15 +1709,6 @@ #define FUNCTION_MODE		QImode
 /* Allow $ in identifiers */
 #define DOLLARS_IN_IDENTIFIERS	1
 
-/* Machine-dependent reorg pass.
-   Specific optimizations are defined here:
-    - this pass changes the Z register into either X or Y
-      (it preserves X/Y previous values in a memory slot in page0). 
-
-   When this pass is finished, the global variable
-   'z_replacement_completed' is set to 2.  */
-#define MACHINE_DEPENDENT_REORG(X)	m68hc11_reorg (X)
-
 extern int debug_m6811;
 extern int z_replacement_completed;
 extern int current_function_interrupt;
Index: config/mcore/mcore-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mcore/mcore-protos.h,v
retrieving revision 1.11
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.11 mcore-protos.h
--- config/mcore/mcore-protos.h	28 Jan 2003 04:46:29 -0000	1.11
+++ config/mcore/mcore-protos.h	13 May 2003 21:06:04 -0000
@@ -60,7 +60,6 @@ extern int          mcore_is_dead       
 extern int          mcore_expand_insv            	PARAMS ((rtx *));
 extern int          mcore_modify_comparison      	PARAMS ((RTX_CODE));
 extern void         mcore_expand_block_move      	PARAMS ((rtx, rtx, rtx *));
-extern void         mcore_dependent_reorg        	PARAMS ((rtx));
 extern const char * mcore_output_andn          		PARAMS ((rtx, rtx *));
 extern void         mcore_print_operand_address  	PARAMS ((FILE *, rtx));
 extern void         mcore_print_operand          	PARAMS ((FILE *, rtx, int));
Index: config/mcore/mcore.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mcore/mcore.c,v
retrieving revision 1.45
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.45 mcore.c
--- config/mcore/mcore.c	20 Apr 2003 18:20:37 -0000	1.45
+++ config/mcore/mcore.c	13 May 2003 21:06:05 -0000
@@ -126,7 +126,8 @@ static void       layout_mcore_frame    
 static cond_type  is_cond_candidate            PARAMS ((rtx));
 static rtx        emit_new_cond_insn           PARAMS ((rtx, int));
 static rtx        conditionalize_block         PARAMS ((rtx));
-static void       conditionalize_optimization  PARAMS ((rtx));
+static void       conditionalize_optimization  PARAMS ((void));
+static void       mcore_reorg                  PARAMS ((void));
 static rtx        handle_structs_in_regs       PARAMS ((enum machine_mode, tree, int));
 static void       mcore_mark_dllexport         PARAMS ((tree));
 static void       mcore_mark_dllimport         PARAMS ((tree));
@@ -173,6 +174,9 @@ #define TARGET_RTX_COSTS mcore_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_0
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG mcore_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Adjust the stack and return the number of bytes taken to do it.  */
@@ -3016,23 +3020,21 @@ conditionalize_block (first)
    in before cse 2).  */
 
 static void
-conditionalize_optimization (first)
-     rtx first;
+conditionalize_optimization ()
 {
   rtx insn;
 
-  for (insn = first; insn; insn = conditionalize_block (insn))
+  for (insn = get_insns (); insn; insn = conditionalize_block (insn))
     continue;
 }
 
 static int saved_warn_return_type = -1;
 static int saved_warn_return_type_count = 0;
 
-/* This function is called from toplev.c before reorg.  */
+/* This is to handle loads from the constant pool.  */
 
-void
-mcore_dependent_reorg (first)
-     rtx first;
+static void
+mcore_reorg ()
 {
   /* Reset this variable.  */
   current_function_anonymous_args = 0;
@@ -3056,7 +3058,7 @@ mcore_dependent_reorg (first)
     return;
   
   /* Conditionalize blocks where we can.  */
-  conditionalize_optimization (first);
+  conditionalize_optimization ();
 
   /* Literal pool generation is now pushed off until the assembler.  */
 }
Index: config/mcore/mcore.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mcore/mcore.h,v
retrieving revision 1.48
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.48 mcore.h
--- config/mcore/mcore.h	29 Apr 2003 14:16:45 -0000	1.48
+++ config/mcore/mcore.h	13 May 2003 21:06:06 -0000
@@ -1246,9 +1246,6 @@ #define PRINT_OPERAND_ADDRESS(STREAM,X) 
 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
   ((CHAR)=='.' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!')
 
-/* This is to handle loads from the constant pool.  */
-#define MACHINE_DEPENDENT_REORG(X) mcore_dependent_reorg (X)
-
 #define PREDICATE_CODES							\
   { "mcore_arith_reg_operand",		{ REG, SUBREG }},		\
   { "mcore_general_movsrc_operand",	{ MEM, CONST_INT, REG, SUBREG }},\
Index: config/mips/mips-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips-protos.h,v
retrieving revision 1.37
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.37 mips-protos.h
--- config/mips/mips-protos.h	6 May 2003 11:23:41 -0000	1.37
+++ config/mips/mips-protos.h	13 May 2003 21:06:06 -0000
@@ -94,7 +94,6 @@ extern void		gen_conditional_move PARAMS
 extern void		mips_gen_conditional_trap PARAMS ((rtx *));
 extern void		mips_emit_fcc_reload PARAMS ((rtx, rtx, rtx));
 extern void		mips_set_return_address PARAMS ((rtx, rtx));
-extern void		machine_dependent_reorg PARAMS ((rtx));
 extern void		mips_count_memory_refs PARAMS ((rtx, int));
 extern HOST_WIDE_INT	mips_debugger_offset PARAMS ((rtx, HOST_WIDE_INT));
 extern const char      *mips_fill_delay_slot PARAMS ((const char *,
Index: config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.261
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.261 mips.c
--- config/mips/mips.c	9 May 2003 06:37:21 -0000	1.261
+++ config/mips/mips.c	13 May 2003 21:06:09 -0000
@@ -247,6 +247,7 @@ static rtx add_constant				PARAMS ((stru
 static void dump_constants			PARAMS ((struct constant *,
 							rtx));
 static rtx mips_find_symbol			PARAMS ((rtx));
+static void mips_reorg				PARAMS ((void));
 static void abort_with_insn			PARAMS ((rtx, const char *))
   ATTRIBUTE_NORETURN;
 static int symbolic_expression_p                PARAMS ((rtx));
@@ -882,6 +883,9 @@ #define TARGET_DELEGITIMIZE_ADDRESS mips
 #undef TARGET_ENCODE_SECTION_INFO
 #define TARGET_ENCODE_SECTION_INFO mips_encode_section_info
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG mips_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* If X is one of the constants described by mips_constant_type,
@@ -9898,21 +9902,20 @@ mips_find_symbol (addr)
   return NULL_RTX;
 }
 
-/* Exported to toplev.c.
-
-   Do a final pass over the function, just before delayed branch
-   scheduling.  */
+/* In mips16 mode, we need to look through the function to check for
+   PC relative loads that are out of range.  */
 
-void
-machine_dependent_reorg (first)
-     rtx first;
+static void
+mips_reorg ()
 {
   int insns_len, max_internal_pool_size, pool_size, addr, first_constant_ref;
-  rtx insn;
+  rtx first, insn;
   struct constant *constants;
 
   if (! TARGET_MIPS16)
     return;
+
+  first = get_insns ();
 
   /* If $gp is used, try to remove stores, and replace loads with
      copies from $gp.  */
Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.247
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.247 mips.h
--- config/mips/mips.h	6 May 2003 11:23:42 -0000	1.247
+++ config/mips/mips.h	13 May 2003 21:06:10 -0000
@@ -4161,10 +4161,6 @@ #define DONT_ACCESS_GBLS_AFTER_EPILOGUE 
 					 && mips_abi != ABI_32		\
 					 && mips_abi != ABI_O64)
 
-/* In mips16 mode, we need to look through the function to check for
-   PC relative loads that are out of range.  */
-#define MACHINE_DEPENDENT_REORG(X) machine_dependent_reorg (X)
-
 /* We need to use a special set of functions to handle hard floating
    point code in mips16 mode.  */
 
Index: config/mmix/mmix-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mmix/mmix-protos.h,v
retrieving revision 1.23
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.23 mmix-protos.h
--- config/mmix/mmix-protos.h	28 Jan 2003 18:08:53 -0000	1.23
+++ config/mmix/mmix-protos.h	13 May 2003 21:06:10 -0000
@@ -97,7 +97,6 @@ extern int mmix_legitimate_address PARAM
 extern int mmix_legitimate_constant_p PARAMS ((rtx));
 extern void mmix_print_operand PARAMS ((FILE *, rtx, int));
 extern void mmix_print_operand_address PARAMS ((FILE *, rtx));
-extern void mmix_machine_dependent_reorg PARAMS ((rtx));
 extern void mmix_expand_prologue PARAMS ((void));
 extern void mmix_expand_epilogue PARAMS ((void));
 extern rtx mmix_get_hard_reg_initial_val PARAMS ((enum machine_mode, int));
Index: config/mmix/mmix.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mmix/mmix.c,v
retrieving revision 1.50
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.50 mmix.c
--- config/mmix/mmix.c	20 Apr 2003 18:20:38 -0000	1.50
+++ config/mmix/mmix.c	13 May 2003 21:06:11 -0000
@@ -132,6 +132,7 @@ static void mmix_target_asm_function_pro
 static void mmix_target_asm_function_end_prologue PARAMS ((FILE *));
 static void mmix_target_asm_function_epilogue
   PARAMS ((FILE *, HOST_WIDE_INT));
+static void mmix_reorg PARAMS ((void));
 static void mmix_asm_output_mi_thunk
   PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree));
 static bool mmix_rtx_costs
@@ -178,6 +179,9 @@ #define TARGET_RTX_COSTS mmix_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_0
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Functions that are expansions for target macros.
@@ -720,7 +724,7 @@ mmix_asm_preferred_eh_data_format (code,
 
 /* Make a note that we've seen the beginning of the prologue.  This
    matters to whether we'll translate register numbers as calculated by
-   mmix_machine_dependent_reorg.  */
+   mmix_reorg.  */
 
 static void
 mmix_target_asm_function_prologue (stream, framesize)
@@ -739,14 +743,12 @@ mmix_target_asm_function_end_prologue (s
   cfun->machine->in_prologue = 0;
 }
 
-/* MACHINE_DEPENDENT_REORG.
-   No actual rearrangements done here; just virtually by calculating the
-   highest saved stack register number used to modify the register numbers
-   at output time.  */
+/* Implement TARGET_MACHINE_DEPENDENT_REORG.  No actual rearrangements
+   done here; just virtually by calculating the highest saved stack
+   register number used to modify the register numbers at output time.  */
 
-void
-mmix_machine_dependent_reorg (first)
-     rtx first ATTRIBUTE_UNUSED;
+static void
+mmix_reorg ()
 {
   int regno;
 
Index: config/mmix/mmix.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mmix/mmix.h,v
retrieving revision 1.51
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.51 mmix.h
--- config/mmix/mmix.h	17 Apr 2003 23:18:57 -0000	1.51
+++ config/mmix/mmix.h	13 May 2003 21:06:12 -0000
@@ -1166,10 +1166,6 @@ #define DOLLARS_IN_IDENTIFIERS 0
 #define NO_DOLLAR_IN_LABEL
 #define NO_DOT_IN_LABEL
 
-/* Calculate the highest used supposed saved stack register.  */
-#define MACHINE_DEPENDENT_REORG(INSN) \
- mmix_machine_dependent_reorg (INSN)
-
 #endif /* GCC_MMIX_H */
 /*
  * Local variables:
Index: config/pa/pa-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa-protos.h,v
retrieving revision 1.24
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.24 pa-protos.h
--- config/pa/pa-protos.h	16 Apr 2003 17:06:50 -0000	1.24
+++ config/pa/pa-protos.h	13 May 2003 21:06:12 -0000
@@ -19,9 +19,6 @@ the Free Software Foundation, 59 Temple 
 Boston, MA 02111-1307, USA.  */
 
 #ifdef RTX_CODE
-/* Prototype function used in MACHINE_DEPENDENT_REORG macro.  */
-extern void pa_reorg PARAMS ((rtx));
-
 /* Prototype function used in various macros.  */
 extern int symbolic_operand PARAMS ((rtx, enum machine_mode));
 
Index: config/pa/pa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.c,v
retrieving revision 1.208
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.208 pa.c
--- config/pa/pa.c	9 May 2003 06:37:22 -0000	1.208
+++ config/pa/pa.c	13 May 2003 21:06:14 -0000
@@ -100,14 +100,15 @@ #define DO_FRAME_NOTES 0
 static int hppa_address_cost PARAMS ((rtx));
 static bool hppa_rtx_costs PARAMS ((rtx, int, int, int *));
 static inline rtx force_mode PARAMS ((enum machine_mode, rtx));
-static void pa_combine_instructions PARAMS ((rtx));
+static void pa_reorg PARAMS ((void));
+static void pa_combine_instructions PARAMS ((void));
 static int pa_can_combine_p PARAMS ((rtx, rtx, rtx, int, rtx, rtx, rtx));
 static int forward_branch_p PARAMS ((rtx));
 static int shadd_constant_p PARAMS ((int));
 static void compute_zdepwi_operands PARAMS ((unsigned HOST_WIDE_INT, unsigned *));
 static int compute_movstrsi_length PARAMS ((rtx));
 static bool pa_assemble_integer PARAMS ((rtx, unsigned int, int));
-static void remove_useless_addtr_insns PARAMS ((rtx, int));
+static void remove_useless_addtr_insns PARAMS ((int));
 static void store_reg PARAMS ((int, int, int));
 static void store_reg_modify PARAMS ((int, int, int));
 static void load_reg PARAMS ((int, int, int));
@@ -231,6 +232,9 @@ #define TARGET_RTX_COSTS hppa_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hppa_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG pa_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 void
@@ -2872,8 +2876,7 @@ output_ascii (file, p, size)
    when there's a 1:1 correspondence between fcmp and ftest/fbranch
    instructions.  */
 static void
-remove_useless_addtr_insns (insns, check_notes)
-     rtx insns;
+remove_useless_addtr_insns (check_notes)
      int check_notes;
 {
   rtx insn;
@@ -2887,8 +2890,7 @@ remove_useless_addtr_insns (insns, check
 
       /* Walk all the insns in this function looking for fcmp & fbranch
 	 instructions.  Keep track of how many of each we find.  */
-      insns = get_insns ();
-      for (insn = insns; insn; insn = next_insn (insn))
+      for (insn = get_insns (); insn; insn = next_insn (insn))
 	{
 	  rtx tmp;
 
@@ -2927,7 +2929,7 @@ remove_useless_addtr_insns (insns, check
 
       /* Find all floating point compare + branch insns.  If possible,
 	 reverse the comparison & the branch to avoid add,tr insns.  */
-      for (insn = insns; insn; insn = next_insn (insn))
+      for (insn = get_insns (); insn; insn = next_insn (insn))
 	{
 	  rtx tmp, next;
 
@@ -3345,7 +3347,7 @@ pa_output_function_prologue (file, size)
 
   fputs ("\n\t.ENTRY\n", file);
 
-  remove_useless_addtr_insns (get_insns (), 0);
+  remove_useless_addtr_insns (0);
 }
 
 void
@@ -7721,24 +7723,22 @@ following_call (insn)
    insns mark where we should emit .begin_brtab and .end_brtab directives
    when using GAS (allows for better link time optimizations).  */
 
-void
-pa_reorg (insns)
-     rtx insns;
+static void
+pa_reorg ()
 {
   rtx insn;
 
-  remove_useless_addtr_insns (insns, 1);
+  remove_useless_addtr_insns (1);
 
   if (pa_cpu < PROCESSOR_8000)
-    pa_combine_instructions (get_insns ());
+    pa_combine_instructions ();
 
 
   /* This is fairly cheap, so always run it if optimizing.  */
   if (optimize > 0 && !TARGET_BIG_SWITCH)
     {
       /* Find and explode all ADDR_VEC or ADDR_DIFF_VEC insns.  */
-      insns = get_insns ();
-      for (insn = insns; insn; insn = NEXT_INSN (insn))
+      for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
 	{
 	  rtx pattern, tmp, location;
 	  unsigned int length, i;
@@ -7835,8 +7835,7 @@ pa_reorg (insns)
   else
     {
       /* Sill need an end_brtab insn.  */
-      insns = get_insns ();
-      for (insn = insns; insn; insn = NEXT_INSN (insn))
+      for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
 	{
 	  /* Find an ADDR_VEC insn.  */
 	  if (GET_CODE (insn) != JUMP_INSN
@@ -7896,8 +7895,7 @@ pa_reorg (insns)
       branch length restrictions.  */
 
 static void
-pa_combine_instructions (insns)
-     rtx insns ATTRIBUTE_UNUSED;
+pa_combine_instructions ()
 {
   rtx anchor, new;
 
Index: config/pa/pa.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.h,v
retrieving revision 1.189
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.189 pa.h
--- config/pa/pa.h	17 Apr 2003 23:18:57 -0000	1.189
+++ config/pa/pa.h	13 May 2003 21:06:15 -0000
@@ -418,10 +418,6 @@ #define WCHAR_TYPE_SIZE 32
 
 /* Show we can debug even without a frame pointer.  */
 #define CAN_DEBUG_WITHOUT_FP
-
-/* Machine dependent reorg pass.  */
-#define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
-
 
 /* target machine storage layout */
 
Index: config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.271
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.271 rs6000.h
--- config/rs6000/rs6000.h	5 May 2003 14:33:00 -0000	1.271
+++ config/rs6000/rs6000.h	13 May 2003 21:06:16 -0000
@@ -2177,14 +2177,6 @@ #define TOC_REGISTER (TARGET_MINIMAL_TOC
    generating position independent code.  */
 
 /* #define LEGITIMATE_PIC_OPERAND_P (X) */
-
-/* In rare cases, correct code generation requires extra machine
-   dependent processing between the second jump optimization pass and
-   delayed branch scheduling.  On those machines, define this macro
-   as a C statement to act on the code starting at INSN.  */
-
-/* #define MACHINE_DEPENDENT_REORG(INSN) */
-
 
 /* Define this if some processing needs to be done immediately before
    emitting code for an insn.  */
Index: config/s390/s390-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390-protos.h,v
retrieving revision 1.28
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.28 s390-protos.h
--- config/s390/s390-protos.h	19 Mar 2003 00:13:01 -0000	1.28
+++ config/s390/s390-protos.h	13 May 2003 21:06:16 -0000
@@ -77,7 +77,6 @@ extern void s390_trampoline_template PAR
 extern void s390_initialize_trampoline PARAMS ((rtx, rtx, rtx));
 extern rtx s390_gen_rtx_const_DI PARAMS ((int, int));
 extern void s390_output_dwarf_dtprel PARAMS ((FILE*, int, rtx));
-extern void s390_machine_dependent_reorg PARAMS ((rtx));
 extern int s390_agen_dep_p PARAMS ((rtx, rtx));
 
 #endif /* RTX_CODE */
Index: config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.90
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.90 s390.c
--- config/s390/s390.c	23 Apr 2003 17:13:11 -0000	1.90
+++ config/s390/s390.c	13 May 2003 21:06:17 -0000
@@ -72,7 +72,7 @@ static int s390_issue_rate PARAMS ((void
 static int s390_use_dfa_pipeline_interface PARAMS ((void));
 static bool s390_rtx_costs PARAMS ((rtx, int, int, int *));
 static int s390_address_cost PARAMS ((rtx));
-
+static void s390_reorg PARAMS ((void));
 
 #undef  TARGET_ASM_ALIGNED_HI_OP
 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
@@ -125,6 +125,9 @@ #define TARGET_RTX_COSTS s390_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST s390_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 extern int reload_completed;
@@ -4941,9 +4944,8 @@ s390_fixup_clobbered_return_reg (return_
 
 /* Perform machine-dependent processing.  */
 
-void
-s390_machine_dependent_reorg (first)
-     rtx first ATTRIBUTE_UNUSED;
+static void
+s390_reorg ()
 {
   bool fixed_up_clobbered_return_reg = 0;
   rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
Index: config/s390/s390.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.h,v
retrieving revision 1.71
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.71 s390.h
--- config/s390/s390.h	10 May 2003 22:59:02 -0000	1.71
+++ config/s390/s390.h	13 May 2003 21:06:17 -0000
@@ -1066,10 +1066,4 @@ #define FUNCTION_MODE QImode
 /* This macro definition sets up a default value for `main' to return.  */
 #define DEFAULT_MAIN_RETURN  c_expand_return (integer_zero_node)
 
-/* In rare cases, correct code generation requires extra machine dependent
-   processing between the second jump optimization pass and delayed branch
-   scheduling.  On those machines, define this macro as a C statement to act on
-   the code starting at INSN.  */
-#define MACHINE_DEPENDENT_REORG(INSN) s390_machine_dependent_reorg (INSN)
-
 #endif 
Index: config/sh/sh-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh-protos.h,v
retrieving revision 1.40
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.40 sh-protos.h
--- config/sh/sh-protos.h	24 Feb 2003 02:44:01 -0000	1.40
+++ config/sh/sh-protos.h	13 May 2003 21:06:18 -0000
@@ -37,7 +37,6 @@ extern const char *output_movedouble PAR
 extern const char *output_movepcrel PARAMS ((rtx, rtx[], enum machine_mode));
 extern const char *output_far_jump PARAMS ((rtx, rtx));
 
-extern void machine_dependent_reorg PARAMS ((rtx));
 extern struct rtx_def *sfunc_uses_reg PARAMS ((rtx));
 extern int barrier_align PARAMS ((rtx));
 extern int sh_loop_align PARAMS ((rtx));
Index: config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.211
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.211 sh.c
--- config/sh/sh.c	9 May 2003 06:37:25 -0000	1.211
+++ config/sh/sh.c	13 May 2003 21:06:19 -0000
@@ -186,6 +186,7 @@ static int mova_p PARAMS ((rtx));
 static rtx find_barrier PARAMS ((int, rtx, rtx));
 static int noncall_uses_reg PARAMS ((rtx, rtx, rtx *));
 static rtx gen_block_redirect PARAMS ((rtx, int, int));
+static void sh_reorg PARAMS ((void));
 static void output_stack_adjust PARAMS ((int, rtx, int, rtx (*) (rtx)));
 static rtx frame_insn PARAMS ((rtx));
 static rtx push PARAMS ((int));
@@ -283,6 +284,9 @@ #define TARGET_RTX_COSTS sh_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST sh_address_cost
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG sh_reorg
+
 #ifdef HAVE_AS_TLS
 #undef TARGET_HAVE_TLS
 #define TARGET_HAVE_TLS true
@@ -3717,20 +3721,19 @@ sh_loop_align (label)
   return align_loops_log;
 }
 
-/* Exported to toplev.c.
-
-   Do a final pass over the function, just before delayed branch
+/* Do a final pass over the function, just before delayed branch
    scheduling.  */
 
-void
-machine_dependent_reorg (first)
-     rtx first;
+static void
+sh_reorg ()
 {
-  rtx insn, mova = NULL_RTX;
+  rtx first, insn, mova = NULL_RTX;
   int num_mova;
   rtx r0_rtx = gen_rtx_REG (Pmode, 0);
   rtx r0_inc_rtx = gen_rtx_POST_INC (Pmode, r0_rtx);
 
+  first = get_insns ();
+
   /* We must split call insns before introducing `mova's.  If we're
      optimizing, they'll have already been split.  Otherwise, make
      sure we don't split them too late.  */
@@ -8449,7 +8452,7 @@ sh_output_mi_thunk (file, thunk_fndecl, 
       schedule_insns (rtl_dump_file);
     }
 
-  MACHINE_DEPENDENT_REORG (insns);
+  sh_reorg ();
 
   if (optimize > 0 && flag_delayed_branch)
       dbr_schedule (insns, rtl_dump_file);
Index: config/sh/sh.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.h,v
retrieving revision 1.198
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.198 sh.h
--- config/sh/sh.h	17 Apr 2003 10:24:58 -0000	1.198
+++ config/sh/sh.h	13 May 2003 21:06:21 -0000
@@ -3122,8 +3122,6 @@ enum mdep_reorg_phase_e
 
 extern enum mdep_reorg_phase_e mdep_reorg_phase;
 
-#define MACHINE_DEPENDENT_REORG(X) machine_dependent_reorg(X)
-
 /* Generate calls to memcpy, memcmp and memset.  */
 
 #define TARGET_MEM_FUNCTIONS
Index: config/sh/sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.144
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.144 sh.md
--- config/sh/sh.md	10 May 2003 22:59:03 -0000	1.144
+++ config/sh/sh.md	13 May 2003 21:06:23 -0000
@@ -6567,7 +6567,7 @@ (define_insn "mova"
   [(set_attr "in_delay_slot" "no")
    (set_attr "type" "arith")])
 
-;; machine_dependent_reorg() will make this a `mova'.
+;; machine_dependent_reorg will make this a `mova'.
 (define_insn "mova_const"
   [(set (reg:SI R0_REG)
 	(unspec:SI [(match_operand 0 "immediate_operand" "i")] UNSPEC_MOVA))]
Index: config/stormy16/stormy16.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/stormy16/stormy16.h,v
retrieving revision 1.75
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.75 stormy16.h
--- config/stormy16/stormy16.h	9 May 2003 00:00:44 -0000	1.75
+++ config/stormy16/stormy16.h	13 May 2003 21:06:24 -0000
@@ -3824,12 +3824,6 @@ #define HANDLE_SYSV_PRAGMA 1
    You need not define this macro if it would always return zero.  */
 /* #define INSN_REFERENCES_ARE_DELAYED(INSN) */
 
-/* In rare cases, correct code generation requires extra machine dependent
-   processing between the second jump optimization pass and delayed branch
-   scheduling.  On those machines, define this macro as a C statement to act on
-   the code starting at INSN.  */
-/* #define MACHINE_DEPENDENT_REORG(INSN) */
-
 /* Define this macro if in some cases global symbols from one translation unit
    may not be bound to undefined symbols in another translation unit without
    user intervention.  For instance, under Microsoft Windows symbols must be
Index: config/v850/v850-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850-protos.h,v
retrieving revision 1.18
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.18 v850-protos.h
--- config/v850/v850-protos.h	13 Mar 2003 03:29:55 -0000	1.18
+++ config/v850/v850-protos.h	13 May 2003 21:06:24 -0000
@@ -48,7 +48,6 @@ extern void   print_operand             
 extern void   print_operand_address         PARAMS ((FILE *, rtx));
 extern const char *output_move_double       PARAMS ((rtx *));
 extern const char *output_move_single       PARAMS ((rtx *));
-extern void   v850_reorg                    PARAMS ((rtx));
 extern void   notice_update_cc              PARAMS ((rtx, rtx));
 extern char * construct_save_jarl           PARAMS ((rtx));
 extern char * construct_restore_jr          PARAMS ((rtx));
Index: config/v850/v850.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.c,v
retrieving revision 1.75
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.75 v850.c
--- config/v850/v850.c	20 Apr 2003 18:20:39 -0000	1.75
+++ config/v850/v850.c	14 May 2003 06:17:19 -0000
@@ -54,6 +54,7 @@ static int  const_costs_int          PAR
 static int  const_costs		     PARAMS ((rtx, enum rtx_code));
 static bool v850_rtx_costs	     PARAMS ((rtx, int, int, int *));
 static void substitute_ep_register   PARAMS ((rtx, rtx, int, int, rtx *, rtx *));
+static void v850_reorg		     PARAMS ((void));
 static int  ep_memory_offset         PARAMS ((enum machine_mode, int));
 static void v850_set_data_area       PARAMS ((tree, v850_data_area));
 const struct attribute_spec v850_attribute_table[];
@@ -109,6 +110,9 @@ #define TARGET_RTX_COSTS v850_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_0
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Sometimes certain combinations of command options do not make
@@ -1318,16 +1322,12 @@ Saved %d bytes (%d uses of register %s) 
 }
 
 
-/* In rare cases, correct code generation requires extra machine
-   dependent processing between the second jump optimization pass and
-   delayed branch scheduling.  On those machines, define this macro
-   as a C statement to act on the code starting at INSN.
-
-   On the 850, we use it to implement the -mep mode to copy heavily used
-   pointers to ep to use the implicit addressing.  */
+/* TARGET_MACHINE_DEPENDENT_REORG.  On the 850, we use it to implement
+   the -mep mode to copy heavily used pointers to ep to use the implicit
+   addressing.  */
 
-void v850_reorg (start_insn)
-     rtx start_insn;
+static void
+v850_reorg ()
 {
   struct
   {
@@ -1355,7 +1355,7 @@ void v850_reorg (start_insn)
       regs[i].last_insn = NULL_RTX;
     }
 
-  for (insn = start_insn; insn != NULL_RTX; insn = NEXT_INSN (insn))
+  for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
     {
       switch (GET_CODE (insn))
 	{
Index: config/v850/v850.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.h,v
retrieving revision 1.84
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.84 v850.h
--- config/v850/v850.h	29 Apr 2003 14:16:48 -0000	1.84
+++ config/v850/v850.h	13 May 2003 21:06:25 -0000
@@ -1009,14 +1009,6 @@ #define LEGITIMATE_CONSTANT_P(X)					\
 	&& GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF		\
 	&& GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT		\
 	&& ! CONST_OK_FOR_K (INTVAL (XEXP (XEXP (X, 0), 1)))))
-
-/* In rare cases, correct code generation requires extra machine
-   dependent processing between the second jump optimization pass and
-   delayed branch scheduling.  On those machines, define this macro
-   as a C statement to act on the code starting at INSN.  */
-
-#define MACHINE_DEPENDENT_REORG(INSN) v850_reorg (INSN)
-
 
 /* Tell final.c how to eliminate redundant test instructions.  */
 
Index: config/xtensa/xtensa-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa-protos.h,v
retrieving revision 1.8
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.8 xtensa-protos.h
--- config/xtensa/xtensa-protos.h	26 Apr 2003 00:06:50 -0000	1.8
+++ config/xtensa/xtensa-protos.h	13 May 2003 21:06:26 -0000
@@ -86,7 +86,6 @@ extern void print_operand PARAMS ((FILE 
 extern void print_operand_address PARAMS ((FILE *, rtx));
 extern void xtensa_output_literal
   PARAMS ((FILE *, rtx, enum machine_mode, int labelno));
-extern void xtensa_reorg PARAMS ((rtx));
 extern rtx xtensa_return_addr PARAMS ((int, rtx));
 extern rtx xtensa_builtin_saveregs PARAMS ((void));
 extern enum reg_class xtensa_preferred_reload_class
Index: config/xtensa/xtensa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.c,v
retrieving revision 1.31
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.31 xtensa.c
--- config/xtensa/xtensa.c	9 May 2003 23:36:39 -0000	1.31
+++ config/xtensa/xtensa.c	13 May 2003 21:06:26 -0000
@@ -198,6 +198,7 @@ static rtx gen_conditional_move PARAMS (
 static rtx fixup_subreg_mem PARAMS ((rtx x));
 static enum machine_mode xtensa_find_mode_for_size PARAMS ((unsigned));
 static struct machine_function * xtensa_init_machine_status PARAMS ((void));
+static void xtensa_reorg PARAMS ((void));
 static void printx PARAMS ((FILE *, signed int));
 static unsigned int xtensa_multibss_section_type_flags
   PARAMS ((tree, const char *, int));
@@ -243,6 +244,9 @@ #define TARGET_RTX_COSTS xtensa_rtx_cost
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_0
 
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG xtensa_reorg
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 
@@ -2187,13 +2191,23 @@ xtensa_frame_pointer_required ()
 }
 
 
-void
-xtensa_reorg (first)
-    rtx first;
+/* If the stack frame size is too big to fit in the immediate field of
+   the ENTRY instruction, we need to store the frame size in the
+   constant pool.  However, the code in xtensa_function_prologue runs too
+   late to be able to add anything to the constant pool.  Since the
+   final frame size isn't known until reload is complete, this seems
+   like the best place to do it.
+
+   There may also be some fixup required if there is an incoming argument
+   in a7 and the function requires a frame pointer. */
+
+static void
+xtensa_reorg ()
 {
-  rtx insn, set_frame_ptr_insn = 0;
+  rtx first, insn, set_frame_ptr_insn = 0;
     
   unsigned long tsize = compute_frame_size (get_frame_size ());
+  first = get_insns ();
   if (tsize < (1 << (12+3)))
     frame_size_const = 0;
   else
Index: config/xtensa/xtensa.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.h,v
retrieving revision 1.30
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.30 xtensa.h
--- config/xtensa/xtensa.h	26 Apr 2003 00:39:02 -0000	1.30
+++ config/xtensa/xtensa.h	13 May 2003 21:06:27 -0000
@@ -1417,22 +1417,6 @@ #define ASM_OUTPUT_ALIGN(STREAM, LOG)			
 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
 
 
-/* Define this macro for the rare case where the RTL needs some sort of
-   machine-dependent fixup immediately before register allocation is done. 
-
-   If the stack frame size is too big to fit in the immediate field of
-   the ENTRY instruction, we need to store the frame size in the
-   constant pool.  However, the code in xtensa_function_prologue runs too
-   late to be able to add anything to the constant pool.  Since the
-   final frame size isn't known until reload is complete, this seems
-   like the best place to do it.
-
-   There may also be some fixup required if there is an incoming argument
-   in a7 and the function requires a frame pointer. */
-
-#define MACHINE_DEPENDENT_REORG(INSN) xtensa_reorg (INSN)
-
-
 /* Define the strings to put out for each section in the object file.  */
 #define TEXT_SECTION_ASM_OP	"\t.text"
 #define DATA_SECTION_ASM_OP	"\t.data"
Index: doc/tm.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/tm.texi,v
retrieving revision 1.217
diff -u -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.217 tm.texi
--- doc/tm.texi	10 May 2003 22:59:04 -0000	1.217
+++ doc/tm.texi	13 May 2003 21:06:30 -0000
@@ -8426,7 +8426,7 @@ the FPSCR PR bit has to be cleared, whil
 operation, this bit has to be set.  Changing the PR bit requires a general
 purpose register as a scratch register, hence these FPSCR sets have to
 be inserted before reload, i.e.@: you can't put this into instruction emitting
-or @code{MACHINE_DEPENDENT_REORG}.
+or @code{TARGET_MACHINE_DEPENDENT_REORG}.
 
 You can have multiple entities that are mode-switched, and select at run time
 which entities actually need it.  @code{OPTIMIZE_MODE_SWITCHING} should
@@ -9143,13 +9143,6 @@ slot of @var{insn}.
 
 You need not define this macro if it would always return zero.
 
-@findex MACHINE_DEPENDENT_REORG
-@item MACHINE_DEPENDENT_REORG (@var{insn})
-In rare cases, correct code generation requires extra machine
-dependent processing between the second jump optimization pass and
-delayed branch scheduling.  On those machines, define this macro as a C
-statement to act on the code starting at @var{insn}.
-
 @findex MULTIPLE_SYMBOL_SPACES
 @item MULTIPLE_SYMBOL_SPACES
 Define this macro if in some cases global symbols from one translation
@@ -9253,6 +9246,21 @@ added to the @code{struct ce_if_block} s
 by the @code{IFCVT_INIT_EXTRA_FIELDS} macro.
 
 @end table
+
+@findex TARGET_MACHINE_DEPENDENT_REORG
+@deftypefn {Target Hook} void TARGET_MACHINE_DEPENDENT_REORG ()
+If non-null, this hook performs a target-specific pass over the
+instruction stream.  The compiler will run it at all optimization levels,
+just before the point at which it normally does delayed-branch scheduling.
+
+The exact purpose of the hook varies from target to target.  Some use
+it to do transformations that are necessary for correctness, such as
+laying out in-function constant pools or avoiding hardware hazards.
+Others use it as an opportunity to do some machine-dependent optimizations.
+
+You need not implement the hook if it has nothing to do.  The default
+definition is null.
+@end deftypefn
 
 @deftypefn {Target Hook} void TARGET_INIT_BUILTINS ()
 Define this hook if you have any machine-specific built-in functions


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]