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Re: [PATCH RS6000] peephole changing a move to itself with compare to a compare


	The poor code should not be fixed with a peephole, although GCC
should not generate a compare by moving to itself.  If the common part of
the compiler is going to present the backend with this type of RTL, the
backend should choose better code from the beginning, like the appended
patch.  Let me know if the patch works for you, it does in my test of your
example. 

	Also, I agree with Richard that the {add,sub}disi peepholes should
be combiner patterns.  Please send revised patches for those two.

Thanks, David


	* config/rs6000/rs6000.md (movsi_internal2): Use compare for self
	move record condition.
	(movdi_internal2): Same.

Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.252
diff -c -p -r1.252 rs6000.md
*** rs6000.md	3 May 2003 23:13:57 -0000	1.252
--- rs6000.md	13 May 2003 20:24:56 -0000
***************
*** 7709,7725 ****
  }")
  
  (define_insn "*movsi_internal2"
!   [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y")
! 	(compare:CC (match_operand:SI 1 "gpc_reg_operand" "r,r")
  		    (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r") (match_dup 1))]
    "! TARGET_POWERPC64"
    "@
     mr. %0,%1
     #"
!   [(set_attr "type" "compare")
!    (set_attr "length" "4,8")])
! 
  (define_split
    [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operand:SI 1 "gpc_reg_operand" "")
--- 7709,7726 ----
  }")
  
  (define_insn "*movsi_internal2"
!   [(set (match_operand:CC 2 "cc_reg_operand" "=x,x,?y")
! 	(compare:CC (match_operand:SI 1 "gpc_reg_operand" "0,r,r")
  		    (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r") (match_dup 1))]
    "! TARGET_POWERPC64"
    "@
+    {cmpi|cmpwi} %2,%0,0
     mr. %0,%1
     #"
!   [(set_attr "type" "cmp,compare,cmp")
!    (set_attr "length" "4,4,8")])
! 
  (define_split
    [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operand:SI 1 "gpc_reg_operand" "")
***************
*** 7731,7737 ****
  	(compare:CC (match_dup 0)
  		    (const_int 0)))]
    "")
! 
  (define_expand "movhi"
    [(set (match_operand:HI 0 "general_operand" "")
  	(match_operand:HI 1 "any_operand" ""))]
--- 7732,7738 ----
  	(compare:CC (match_dup 0)
  		    (const_int 0)))]
    "")
! 
  (define_expand "movhi"
    [(set (match_operand:HI 0 "general_operand" "")
  	(match_operand:HI 1 "any_operand" ""))]
***************
*** 8623,8638 ****
  
  ;; Split a load of a large constant into the appropriate five-instruction
  (define_insn "*movdi_internal2"
!   [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y")
! 	(compare:CC (match_operand:DI 1 "gpc_reg_operand" "r,r")
  		    (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "=r,r") (match_dup 1))]
    "TARGET_POWERPC64"
    "@
     mr. %0,%1
     #"
!   [(set_attr "type" "compare")
!    (set_attr "length" "4,8")])
  
  (define_split
    [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
--- 8624,8640 ----
  
  ;; Split a load of a large constant into the appropriate five-instruction
  (define_insn "*movdi_internal2"
!   [(set (match_operand:CC 2 "cc_reg_operand" "=x,x,?y")
! 	(compare:CC (match_operand:DI 1 "gpc_reg_operand" "0,r,r")
  		    (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r") (match_dup 1))]
    "TARGET_POWERPC64"
    "@
+    cmpdi %2,%0,0
     mr. %0,%1
     #"
!   [(set_attr "type" "cmp,compare,cmp")
!    (set_attr "length" "4,4,8")])
  
  (define_split
    [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")



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