PATCH ARM: More scc improvements

[Richard Earnshaw <rearnsha at arm dot com>]

This patch optimizes a few more scc cases.

1) It uses the code sequence suggested by Olly Betts for 

  (set x (eq y (const_int 0)))

2) It adds patterns to deal with the cases where we have

  (set x (ior/and (cond_op1 a b)
		  (cond_op2 c d)))
  (set cc (compare x (const_int 0)))

And there is a dominance relationship between cond_op1 and cond_op2.  In 
this case we can eliminate the compare on x and simply use the flag 
settings established by the initial compare.

3) Finally, if there is no dominance relationship between cond_op1 and 
cond_op2  in the AND case, then we can save an instruction over the 
existing code:

	cmp	a, b
	movC1	x, #1
	movNC1	x, #0
	cmp	c, d
	andC2	x, x, #1
	movNC2	x, #0

That penultimate instruction is redundant, since X will already contain 0 
or 1, giving:

	cmp	a, b
	movNC1	x, #0
	movC1	x, #1
	cmp	c, d
	movNC2	x, #0

2003-05-13  Richard Earnshaw  <rearnsha@arm.com>

	* arm.md (compare_scc): Use shorter sequence for EQ case.
	(ior_scc_scc_cmp, and_scc_scc_cmp): New insn-and-split patterns.
	(and_scc_scc): Ensure split only applies when there is a dominance
	of the comparisons.
	(and_scc_scc_nodom): New insn-and-split pattern.

Attachment: scc.patch
Description: scc.patch