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patch: ppc-e500: evsubfw changes


Thinko fixes to mainline and e500 branch.

With these last set of changes, there are only about a dozen failures in the Motorola SPE testsuite, and they're all minor. Woo hoo, down from about 200.

2003-05-07 Aldy Hernandez <aldyh@redhat.com>

	* config/rs6000/spe.h: Reverse arguments for __ev_subfw.
	Unreverse arguments for __ev_subw.

* config/rs6000/spe.md (evsubfw): Reverse arguments of assembly.

Index: config/rs6000/spe.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/spe.h,v
retrieving revision 1.13
diff -c -p -r1.13 spe.h
*** config/rs6000/spe.h	5 May 2003 15:50:31 -0000	1.13
--- config/rs6000/spe.h	7 May 2003 18:18:38 -0000
*************** typedef int 			__vector __ev64_opaque__;
*** 52,59 ****

  #define __ev_addw __builtin_spe_evaddw
  #define __ev_addiw __builtin_spe_evaddiw
! #define __ev_subfw __builtin_spe_evsubfw
! #define __ev_subw(a,b) __builtin_spe_evsubfw ((b), (a))
  #define __ev_subifw(a,b) __builtin_spe_evsubifw ((b), (a))
  #define __ev_subiw __builtin_spe_evsubifw
  #define __ev_abs __builtin_spe_evabs
--- 52,59 ----

  #define __ev_addw __builtin_spe_evaddw
  #define __ev_addiw __builtin_spe_evaddiw
! #define __ev_subfw(a,b) __builtin_spe_evsubfw ((b), (a))
! #define __ev_subw __builtin_spe_evsubfw
  #define __ev_subifw(a,b) __builtin_spe_evsubifw ((b), (a))
  #define __ev_subiw __builtin_spe_evsubifw
  #define __ev_abs __builtin_spe_evabs
Index: config/rs6000/spe.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/spe.md,v
retrieving revision 1.12
diff -c -p -r1.12 spe.md
*** config/rs6000/spe.md	13 Apr 2003 17:51:08 -0000	1.12
--- config/rs6000/spe.md	7 May 2003 18:18:39 -0000
***************
*** 1915,1921 ****
          (minus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
  		    (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
    "TARGET_SPE"
!   "evsubfw %0,%1,%2"
    [(set_attr "type" "veccomplex")
     (set_attr  "length" "4")])

--- 1915,1921 ----
          (minus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
  		    (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
    "TARGET_SPE"
!   "evsubfw %0,%2,%1"
    [(set_attr "type" "veccomplex")
     (set_attr  "length" "4")])


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