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Re: arm-pe: Do not generate type 2 LDM instructions with writeback
- From: Nick Clifton <nickc at redhat dot com>
- To: Richard dot Earnshaw at arm dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: 13 Mar 2003 13:32:13 +0000
- Subject: Re: arm-pe: Do not generate type 2 LDM instructions with writeback
- References: <200303131214.h2DCElW23979@pc960.cambridge.arm.com>
Hi Richard,
> > Whilst looking over the arm-pe port I found that it was generating
> > LDM instructions using writeback "sp!" and CPSR update "^" which is
> > UNPREDICTABLE if the PC is not one of the registers being loaded.
> > The following patch takes care of this problem and fixes quite a few
> > unexpected failures in the gcc testsuite. (There are still lots
> > more that need to be looked at though - maybe one day).
>
> GCC should never be generating a forced user-bank accessing
> instruction (^ on non-pc loading) -- at least, it won't ever be
> doing so via these functions -- so I think the test for write-back
> is redundant. That is, emit ^ if PC is in the list and !apcs-32,
> but not otherwise.
That seems reasonable. Updated patch appended.
> PS. Is the pe port using apcs-26?
It would appear so.
> If so, why?
Because it is so old ?
It is a simple matter to fix it by changing the definition of
TARGET_DEFAULT in pe.h to:
#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | TARGET_FLAG_NOP_FUN)
Although it would be simpler to make apcs-32 the default and require
that apcs-26 be deliberately selected by the appropriate header file.
I am not sure if this is a good idea though, since presumably any
arm-pe tools out there are currently using apcs-26. Mind you, given
the terrible state of the arm-pe port at the moment, it is unlikely
that anyone is actually using it.
Not sure what to do really. I do not have any real arm-pe
environments in which I can test the tools, so I do not know what
would be for the best. Is there anybody out there who uses arm-pe ?
Cheers
Nick
Index: gcc/config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.266
diff -c -3 -p -w -r1.266 arm.c
*** gcc/config/arm/arm.c 13 Mar 2003 12:03:36 -0000 1.266
--- gcc/config/arm/arm.c 13 Mar 2003 13:23:48 -0000
*************** print_multi_reg (stream, instr, reg, mas
*** 7207,7217 ****
fprintf (stream, "}");
/* Add a ^ character for the 26-bit ABI, but only if we were loading
! the PC or not updating the stack pointer. Otherwise we generate
! an UNPREDICTABLE instruction. */
if (! TARGET_APCS_32
! && (((mask & (1 << PC_REGNUM)) != 0)
! || strchr (instr, '!') == NULL))
fprintf (stream, "^");
fprintf (stream, "\n");
--- 7207,7220 ----
fprintf (stream, "}");
/* Add a ^ character for the 26-bit ABI, but only if we were loading
! the PC. Otherwise we would generate an UNPREDICTABLE instruction.
! Strictly speaking the instruction would be unpredicatble only if
! we were writing back the base register as well, but since we never
! want to generate an LDM type 2 instruction (register bank switching)
! which is what you get if the PC is not being loaded, we do not need
! to check for writeback. */
if (! TARGET_APCS_32
! && ((mask & (1 << PC_REGNUM)) != 0))
fprintf (stream, "^");
fprintf (stream, "\n");