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Re: [tree-ssa] VLA fixes
- From: law at redhat dot com
- To: Diego Novillo <dnovillo at redhat dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 24 Feb 2003 11:44:58 -0700
- Subject: Re: [tree-ssa] VLA fixes
- Reply-to: law at redhat dot com
In message <1045868446 dot 12027 dot 5 dot camel at frodo>, Diego Novillo writes:
>On Fri, 2003-02-21 at 17:54, law at redhat dot com wrote:
>
>> It doesn't look awful. In fact, the RTL generated after tree optimizations
>> is actually better than what would be generated without the tree optimizers
>.
>>
>Not that :) What I meant is that we then go on to get an ICE in reload:
>
>-----------------------------------------------------------------------------
>20020412-1.c: In function `main':
>20020412-1.c:55: error: unable to find a register to spill in class `AREG'
>20020412-1.c:55: error: this is the insn:
>(insn 129 128 130 2 0x40220dc0 (set (reg:CCNO 17 flags)
> (compare:CCNO (and:SI (reg/v:SI 71 [ T.29 ])
> (const_int 3 [0x3]))
> (const_int 0 [0x0]))) 205 {testsi_1} (nil)
> (expr_list:REG_DEAD (reg/v:SI 71 [ T.29 ])
> (nil)))
>20020412-1.c:55: internal compiler error: in spill_failure, at reload1.c:1924
>-----------------------------------------------------------------------------
>
>Yes, in general RTL that comes out of the tree optimizers looks simpler.
It's definitely an ia32 backend bug. With some coaxing I've managed to get
this bug triggered in the mainline sources and I'm bootstrapping a fix right
now.
Patch and testcase will be posted as soon as I've bootstrapped and
regression tested my fix.
jeff