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Re: [3.3/mainline] FIx SSE move patterns
> On Mon, Feb 03, 2003 at 12:55:25AM +0100, Jan Hubicka wrote:
> > * i386.c (ix86_expand_store_builtin): Always force op1 to memory.
>
> You're actually forcing to register.
>
> > (define_expand "movti"
> > ! [(set (match_operand:TI 0 "nonimmediate_operand" "")
> > ! (match_operand:TI 1 "nonimmediate_operand" ""))]
> > "TARGET_SSE || TARGET_64BIT"
> > {
> > + if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
> > + operands[0] = force_reg (TImode, operands[0]);
>
> This is incorrect. You want to force op1 to register.
>
> > (define_expand "movv2df"
> > ! [(set (match_operand:V2DF 0 "nonimmediate_operand" "")
> > ! (match_operand:V2DF 1 "nonimmediate_operand" ""))]
> > "TARGET_SSE2"
> > {
> > + if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
> > + operands[0] = force_reg (V2DFmode, operands[0]);
> > ix86_expand_vector_move (V2DFmode, operands);
>
> Also incorrect. And why don't you handle this in
> ix86_expand_vector_move instead?
And here is udpated patch I am testing right now.
OK, assuming it passes?
Mon Feb 3 00:45:18 CET 2003 Jan Hubicka <jh@suse.cz>
* i386.c (ix86_expand_store_builtin): Always force op1 to register.
(mov*_internal): Fix predicates; require one of operands to not be memory.
(SSE?MMX move expanders): Fix predicates; force one of operands to register.
(SSE/MMX push patterns): Reorganize; fix x86-64 code generation.
(movups/movupd/movdqu patterns): Force one of operands to not be memory.
Index: i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.521
diff -c -3 -p -r1.521 i386.c
*** i386.c 31 Jan 2003 23:34:14 -0000 1.521
--- i386.c 2 Feb 2003 23:45:08 -0000
*************** ix86_expand_store_builtin (icode, arglis
*** 13496,13504 ****
op1 = safe_vector_operand (op1, mode1);
op0 = gen_rtx_MEM (mode0, copy_to_mode_reg (Pmode, op0));
!
! if (! (*insn_data[icode].operand[1].predicate) (op1, mode1))
! op1 = copy_to_mode_reg (mode1, op1);
pat = GEN_FCN (icode) (op0, op1);
if (pat)
--- 13496,13502 ----
op1 = safe_vector_operand (op1, mode1);
op0 = gen_rtx_MEM (mode0, copy_to_mode_reg (Pmode, op0));
! op1 = copy_to_mode_reg (mode1, op1);
pat = GEN_FCN (icode) (op0, op1);
if (pat)
Index: i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.413
diff -c -3 -p -r1.413 i386.md
*** i386.md 20 Jan 2003 13:37:03 -0000 1.413
--- i386.md 3 Feb 2003 19:04:12 -0000
***************
*** 18564,18570 ****
(define_insn "movv8qi_internal"
[(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m")
(match_operand:V8QI 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_MMX"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxmov")
(set_attr "mode" "DI")])
--- 18564,18571 ----
(define_insn "movv8qi_internal"
[(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m")
(match_operand:V8QI 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_MMX
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxmov")
(set_attr "mode" "DI")])
***************
*** 18572,18578 ****
(define_insn "movv4hi_internal"
[(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,m")
(match_operand:V4HI 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_MMX"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxmov")
(set_attr "mode" "DI")])
--- 18573,18580 ----
(define_insn "movv4hi_internal"
[(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,m")
(match_operand:V4HI 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_MMX
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxmov")
(set_attr "mode" "DI")])
***************
*** 18580,18586 ****
(define_insn "movv2si_internal"
[(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,m")
(match_operand:V2SI 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_MMX"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxcvt")
(set_attr "mode" "DI")])
--- 18582,18589 ----
(define_insn "movv2si_internal"
[(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,m")
(match_operand:V2SI 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_MMX
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxcvt")
(set_attr "mode" "DI")])
***************
*** 18588,18601 ****
(define_insn "movv2sf_internal"
[(set (match_operand:V2SF 0 "nonimmediate_operand" "=y,m")
(match_operand:V2SF 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_3DNOW"
"movq\\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxcvt")
(set_attr "mode" "DI")])
(define_expand "movti"
! [(set (match_operand:TI 0 "general_operand" "")
! (match_operand:TI 1 "general_operand" ""))]
"TARGET_SSE || TARGET_64BIT"
{
if (TARGET_64BIT)
--- 18591,18605 ----
(define_insn "movv2sf_internal"
[(set (match_operand:V2SF 0 "nonimmediate_operand" "=y,m")
(match_operand:V2SF 1 "nonimmediate_operand" "ym,y"))]
! "TARGET_3DNOW
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"movq\\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxcvt")
(set_attr "mode" "DI")])
(define_expand "movti"
! [(set (match_operand:TI 0 "nonimmediate_operand" "")
! (match_operand:TI 1 "nonimmediate_operand" ""))]
"TARGET_SSE || TARGET_64BIT"
{
if (TARGET_64BIT)
***************
*** 18608,18614 ****
(define_insn "movv2df_internal"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
(match_operand:V2DF 1 "nonimmediate_operand" "xm,x"))]
! "TARGET_SSE2"
{
if (get_attr_mode (insn) == MODE_V4SF)
return "movaps\t{%1, %0|%0, %1}";
--- 18612,18619 ----
(define_insn "movv2df_internal"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
(match_operand:V2DF 1 "nonimmediate_operand" "xm,x"))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
if (get_attr_mode (insn) == MODE_V4SF)
return "movaps\t{%1, %0|%0, %1}";
***************
*** 18636,18642 ****
(define_insn "movv8hi_internal"
[(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,m")
(match_operand:V8HI 1 "nonimmediate_operand" "xm,x"))]
! "TARGET_SSE2"
{
if (get_attr_mode (insn) == MODE_V4SF)
return "movaps\t{%1, %0|%0, %1}";
--- 18641,18648 ----
(define_insn "movv8hi_internal"
[(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,m")
(match_operand:V8HI 1 "nonimmediate_operand" "xm,x"))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
if (get_attr_mode (insn) == MODE_V4SF)
return "movaps\t{%1, %0|%0, %1}";
***************
*** 18664,18670 ****
(define_insn "movv16qi_internal"
[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
(match_operand:V16QI 1 "nonimmediate_operand" "xm,x"))]
! "TARGET_SSE2"
{
if (get_attr_mode (insn) == MODE_V4SF)
return "movaps\t{%1, %0|%0, %1}";
--- 18670,18677 ----
(define_insn "movv16qi_internal"
[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
(match_operand:V16QI 1 "nonimmediate_operand" "xm,x"))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
if (get_attr_mode (insn) == MODE_V4SF)
return "movaps\t{%1, %0|%0, %1}";
***************
*** 18690,18697 ****
(const_string "TI")))])
(define_expand "movv2df"
! [(set (match_operand:V2DF 0 "general_operand" "")
! (match_operand:V2DF 1 "general_operand" ""))]
"TARGET_SSE2"
{
ix86_expand_vector_move (V2DFmode, operands);
--- 18697,18704 ----
(const_string "TI")))])
(define_expand "movv2df"
! [(set (match_operand:V2DF 0 "nonimmediate_operand" "")
! (match_operand:V2DF 1 "nonimmediate_operand" ""))]
"TARGET_SSE2"
{
ix86_expand_vector_move (V2DFmode, operands);
***************
*** 18699,18706 ****
})
(define_expand "movv8hi"
! [(set (match_operand:V8HI 0 "general_operand" "")
! (match_operand:V8HI 1 "general_operand" ""))]
"TARGET_SSE2"
{
ix86_expand_vector_move (V8HImode, operands);
--- 18706,18713 ----
})
(define_expand "movv8hi"
! [(set (match_operand:V8HI 0 "nonimmediate_operand" "")
! (match_operand:V8HI 1 "nonimmediate_operand" ""))]
"TARGET_SSE2"
{
ix86_expand_vector_move (V8HImode, operands);
***************
*** 18708,18715 ****
})
(define_expand "movv16qi"
! [(set (match_operand:V16QI 0 "general_operand" "")
! (match_operand:V16QI 1 "general_operand" ""))]
"TARGET_SSE2"
{
ix86_expand_vector_move (V16QImode, operands);
--- 18715,18722 ----
})
(define_expand "movv16qi"
! [(set (match_operand:V16QI 0 "nonimmediate_operand" "")
! (match_operand:V16QI 1 "nonimmediate_operand" ""))]
"TARGET_SSE2"
{
ix86_expand_vector_move (V16QImode, operands);
***************
*** 18717,18724 ****
})
(define_expand "movv4sf"
! [(set (match_operand:V4SF 0 "general_operand" "")
! (match_operand:V4SF 1 "general_operand" ""))]
"TARGET_SSE"
{
ix86_expand_vector_move (V4SFmode, operands);
--- 18724,18731 ----
})
(define_expand "movv4sf"
! [(set (match_operand:V4SF 0 "nonimmediate_operand" "")
! (match_operand:V4SF 1 "nonimmediate_operand" ""))]
"TARGET_SSE"
{
ix86_expand_vector_move (V4SFmode, operands);
***************
*** 18726,18733 ****
})
(define_expand "movv4si"
! [(set (match_operand:V4SI 0 "general_operand" "")
! (match_operand:V4SI 1 "general_operand" ""))]
"TARGET_SSE"
{
ix86_expand_vector_move (V4SImode, operands);
--- 18733,18740 ----
})
(define_expand "movv4si"
! [(set (match_operand:V4SI 0 "nonimmediate_operand" "")
! (match_operand:V4SI 1 "nonimmediate_operand" ""))]
"TARGET_SSE"
{
ix86_expand_vector_move (V4SImode, operands);
***************
*** 18735,18742 ****
})
(define_expand "movv2di"
! [(set (match_operand:V2DI 0 "general_operand" "")
! (match_operand:V2DI 1 "general_operand" ""))]
"TARGET_SSE"
{
ix86_expand_vector_move (V2DImode, operands);
--- 18742,18749 ----
})
(define_expand "movv2di"
! [(set (match_operand:V2DI 0 "nonimmediate_operand" "")
! (match_operand:V2DI 1 "nonimmediate_operand" ""))]
"TARGET_SSE"
{
ix86_expand_vector_move (V2DImode, operands);
***************
*** 18744,18751 ****
})
(define_expand "movv2si"
! [(set (match_operand:V2SI 0 "general_operand" "")
! (match_operand:V2SI 1 "general_operand" ""))]
"TARGET_MMX"
{
ix86_expand_vector_move (V2SImode, operands);
--- 18751,18758 ----
})
(define_expand "movv2si"
! [(set (match_operand:V2SI 0 "nonimmediate_operand" "")
! (match_operand:V2SI 1 "nonimmediate_operand" ""))]
"TARGET_MMX"
{
ix86_expand_vector_move (V2SImode, operands);
***************
*** 18753,18760 ****
})
(define_expand "movv4hi"
! [(set (match_operand:V4HI 0 "general_operand" "")
! (match_operand:V4HI 1 "general_operand" ""))]
"TARGET_MMX"
{
ix86_expand_vector_move (V4HImode, operands);
--- 18760,18767 ----
})
(define_expand "movv4hi"
! [(set (match_operand:V4HI 0 "nonimmediate_operand" "")
! (match_operand:V4HI 1 "nonimmediate_operand" ""))]
"TARGET_MMX"
{
ix86_expand_vector_move (V4HImode, operands);
***************
*** 18762,18769 ****
})
(define_expand "movv8qi"
! [(set (match_operand:V8QI 0 "general_operand" "")
! (match_operand:V8QI 1 "general_operand" ""))]
"TARGET_MMX"
{
ix86_expand_vector_move (V8QImode, operands);
--- 18769,18776 ----
})
(define_expand "movv8qi"
! [(set (match_operand:V8QI 0 "nonimmediate_operand" "")
! (match_operand:V8QI 1 "nonimmediate_operand" ""))]
"TARGET_MMX"
{
ix86_expand_vector_move (V8QImode, operands);
***************
*** 18771,18909 ****
})
(define_expand "movv2sf"
! [(set (match_operand:V2SF 0 "general_operand" "")
! (match_operand:V2SF 1 "general_operand" ""))]
"TARGET_3DNOW"
{
ix86_expand_vector_move (V2SFmode, operands);
DONE;
})
! (define_insn_and_split "*pushti"
[(set (match_operand:TI 0 "push_operand" "=<")
! (match_operand:TI 1 "nonmemory_operand" "x"))]
"TARGET_SSE"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:TI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv2df"
[(set (match_operand:V2DF 0 "push_operand" "=<")
! (match_operand:V2DF 1 "nonmemory_operand" "x"))]
! "TARGET_SSE2"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:V2DF (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv2di"
[(set (match_operand:V2DI 0 "push_operand" "=<")
! (match_operand:V2DI 1 "nonmemory_operand" "x"))]
"TARGET_SSE2"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:V2DI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv8hi"
[(set (match_operand:V8HI 0 "push_operand" "=<")
! (match_operand:V8HI 1 "nonmemory_operand" "x"))]
"TARGET_SSE2"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:V8HI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv16qi"
[(set (match_operand:V16QI 0 "push_operand" "=<")
! (match_operand:V16QI 1 "nonmemory_operand" "x"))]
"TARGET_SSE2"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:V16QI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv4sf"
[(set (match_operand:V4SF 0 "push_operand" "=<")
! (match_operand:V4SF 1 "nonmemory_operand" "x"))]
"TARGET_SSE"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:V4SF (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv4si"
[(set (match_operand:V4SI 0 "push_operand" "=<")
! (match_operand:V4SI 1 "nonmemory_operand" "x"))]
! "TARGET_SSE"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
! (set (mem:V4SI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "multi")])
! (define_insn_and_split "*pushv2si"
[(set (match_operand:V2SI 0 "push_operand" "=<")
! (match_operand:V2SI 1 "nonmemory_operand" "y"))]
"TARGET_MMX"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
! (set (mem:V2SI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "mmx")])
! (define_insn_and_split "*pushv4hi"
[(set (match_operand:V4HI 0 "push_operand" "=<")
! (match_operand:V4HI 1 "nonmemory_operand" "y"))]
"TARGET_MMX"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
! (set (mem:V4HI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "mmx")])
! (define_insn_and_split "*pushv8qi"
[(set (match_operand:V8QI 0 "push_operand" "=<")
! (match_operand:V8QI 1 "nonmemory_operand" "y"))]
"TARGET_MMX"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
! (set (mem:V8QI (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "mmx")])
! (define_insn_and_split "*pushv2sf"
[(set (match_operand:V2SF 0 "push_operand" "=<")
! (match_operand:V2SF 1 "nonmemory_operand" "y"))]
"TARGET_3DNOW"
! "#"
! ""
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
! (set (mem:V2SF (reg:SI 7)) (match_dup 1))]
! ""
! [(set_attr "type" "mmx")])
(define_insn "movti_internal"
[(set (match_operand:TI 0 "nonimmediate_operand" "=x,x,m")
(match_operand:TI 1 "general_operand" "C,xm,x"))]
! "TARGET_SSE && !TARGET_64BIT"
{
switch (which_alternative)
{
--- 18778,18885 ----
})
(define_expand "movv2sf"
! [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
! (match_operand:V2SF 1 "nonimmediate_operand" ""))]
"TARGET_3DNOW"
{
ix86_expand_vector_move (V2SFmode, operands);
DONE;
})
! (define_insn "*pushti"
[(set (match_operand:TI 0 "push_operand" "=<")
! (match_operand:TI 1 "register_operand" "x"))]
"TARGET_SSE"
! "#")
! (define_insn "*pushv2df"
[(set (match_operand:V2DF 0 "push_operand" "=<")
! (match_operand:V2DF 1 "register_operand" "x"))]
! "TARGET_SSE"
! "#")
! (define_insn "*pushv2di"
[(set (match_operand:V2DI 0 "push_operand" "=<")
! (match_operand:V2DI 1 "register_operand" "x"))]
"TARGET_SSE2"
! "#")
! (define_insn "*pushv8hi"
[(set (match_operand:V8HI 0 "push_operand" "=<")
! (match_operand:V8HI 1 "register_operand" "x"))]
"TARGET_SSE2"
! "#")
! (define_insn "*pushv16qi"
[(set (match_operand:V16QI 0 "push_operand" "=<")
! (match_operand:V16QI 1 "register_operand" "x"))]
"TARGET_SSE2"
! "#")
! (define_insn "*pushv4sf"
[(set (match_operand:V4SF 0 "push_operand" "=<")
! (match_operand:V4SF 1 "register_operand" "x"))]
"TARGET_SSE"
! "#")
! (define_insn "*pushv4si"
[(set (match_operand:V4SI 0 "push_operand" "=<")
! (match_operand:V4SI 1 "register_operand" "x"))]
! "TARGET_SSE2"
! "#")
! (define_insn "*pushv2si"
[(set (match_operand:V2SI 0 "push_operand" "=<")
! (match_operand:V2SI 1 "register_operand" "y"))]
"TARGET_MMX"
! "#")
! (define_insn "*pushv4hi"
[(set (match_operand:V4HI 0 "push_operand" "=<")
! (match_operand:V4HI 1 "register_operand" "y"))]
"TARGET_MMX"
! "#")
! (define_insn "*pushv8qi"
[(set (match_operand:V8QI 0 "push_operand" "=<")
! (match_operand:V8QI 1 "register_operand" "y"))]
"TARGET_MMX"
! "#")
! (define_insn "*pushv2sf"
[(set (match_operand:V2SF 0 "push_operand" "=<")
! (match_operand:V2SF 1 "register_operand" "y"))]
"TARGET_3DNOW"
! "#")
!
! (define_split
! [(set (match_operand 0 "push_operand" "")
! (match_operand 1 "register_operand" ""))]
! "!TARGET_64BIT && reload_completed
! && (SSE_REG_P (operands[1]) || MMX_REG_P (operands[1]))"
! [(set (reg:SI 7) (plus:SI (reg:SI 7) (match_dup 3)))
! (set (match_dup 2) (match_dup 1))]
! "operands[2] = change_address (operands[0], GET_MODE (operands[0]),
! stack_pointer_rtx);
! operands[3] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0])));")
!
! (define_split
! [(set (match_operand 0 "push_operand" "")
! (match_operand 1 "register_operand" ""))]
! "TARGET_64BIT && reload_completed
! && (SSE_REG_P (operands[1]) || MMX_REG_P (operands[1]))"
! [(set (reg:DI 7) (plus:DI (reg:DI 7) (match_dup 3)))
! (set (match_dup 2) (match_dup 1))]
! "operands[2] = change_address (operands[0], GET_MODE (operands[0]),
! stack_pointer_rtx);
! operands[3] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0])));")
!
(define_insn "movti_internal"
[(set (match_operand:TI 0 "nonimmediate_operand" "=x,x,m")
(match_operand:TI 1 "general_operand" "C,xm,x"))]
! "TARGET_SSE && !TARGET_64BIT
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
switch (which_alternative)
{
***************
*** 18996,19005 ****
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVA))]
! "TARGET_SSE"
! "@
! movaps\t{%1, %0|%0, %1}
! movaps\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov,ssemov")
(set_attr "mode" "V4SF")])
--- 18972,18980 ----
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVA))]
! "TARGET_SSE
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
! "movaps\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov,ssemov")
(set_attr "mode" "V4SF")])
***************
*** 19007,19016 ****
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVU))]
! "TARGET_SSE"
! "@
! movups\t{%1, %0|%0, %1}
! movups\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt,ssecvt")
(set_attr "mode" "V4SF")])
--- 18982,18990 ----
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVU))]
! "TARGET_SSE
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
! "movups\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt,ssecvt")
(set_attr "mode" "V4SF")])
***************
*** 22449,22493 ****
(define_insn "sse2_movapd"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
! (unspec:V2DF [(match_operand:V2DF 1 "general_operand" "xm,x")]
UNSPEC_MOVA))]
! "TARGET_SSE2"
! "@
! movapd\t{%1, %0|%0, %1}
! movapd\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "mode" "V2DF")])
(define_insn "sse2_movupd"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
! (unspec:V2DF [(match_operand:V2DF 1 "general_operand" "xm,x")]
UNSPEC_MOVU))]
! "TARGET_SSE2"
! "@
! movupd\t{%1, %0|%0, %1}
! movupd\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "V2DF")])
(define_insn "sse2_movdqa"
[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
! (unspec:V16QI [(match_operand:V16QI 1 "general_operand" "xm,x")]
UNSPEC_MOVA))]
! "TARGET_SSE2"
! "@
! movdqa\t{%1, %0|%0, %1}
! movdqa\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "mode" "TI")])
(define_insn "sse2_movdqu"
[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
! (unspec:V16QI [(match_operand:V16QI 1 "general_operand" "xm,x")]
UNSPEC_MOVU))]
! "TARGET_SSE2"
! "@
! movdqu\t{%1, %0|%0, %1}
! movdqu\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "TI")])
--- 22423,22463 ----
(define_insn "sse2_movapd"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
! (unspec:V2DF [(match_operand:V2DF 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVA))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
! "movapd\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "mode" "V2DF")])
(define_insn "sse2_movupd"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
! (unspec:V2DF [(match_operand:V2DF 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVU))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
! "movupd\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "V2DF")])
(define_insn "sse2_movdqa"
[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
! (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVA))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
! "movdqa\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "mode" "TI")])
(define_insn "sse2_movdqu"
[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
! (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVU))]
! "TARGET_SSE2
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
! "movdqu\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "TI")])
Index: linux64.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/linux64.h,v
retrieving revision 1.19
diff -c -3 -p -r1.19 linux64.h
*** linux64.h 14 Jan 2003 13:33:02 -0000 1.19
--- linux64.h 3 Feb 2003 19:04:12 -0000
*************** Boston, MA 02111-1307, USA. */
*** 23,28 ****
--- 23,31 ----
#define TARGET_VERSION fprintf (stderr, " (x86-64 Linux/ELF)");
+ /* Attempt to enable execute permissions on the stack. */
+ #define TRANSFER_FROM_TRAMPOLINE TARGET_64BIT
+
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \