This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: bootstrap failure on darwin6.1


David Edelsohn <dje@watson.ibm.com> writes:

> 	REGISTER_MOVE_COSTS has become too complicated on PowerPC to be
> implemented as a macro.  I am playing with something like the following as
> a starting point:

That looks pretty good, although I have some suggestions.  In fact, it
turned out to be easier to rewrite it as:

> int
> rs6000_register_move_cost (mode, from, to)
>      enum machine_mode mode;
>      enum reg_class from, to;
> {

/*  Moves from/to GENERAL_REGS.  */
if (reg_classes_intersect_p (to, GENERAL_REGS)
    || reg_classes_intersect_p (from, GENERAL_REGS))
  {
    if (! reg_classes_intersect_p (to, GENERAL_REGS))
      from = to;

    if (from == FLOAT_REGS || from == ALTIVEC_REGS)
      return MEMORY_MOVE_COST (mode, from, 0)
             + MEMORY_MOVE_COST (mode, GENERAL_REGS, 0);

/* It's more expensive to move CR_REGS than CR0_REGS because of the shift...*/
    else if (from == CR_REGS)
      return 4;

    else
/* A move will cost one instruction per GPR moved.  */
      return 2 * HARD_REGNO_NREGS (0, mode);
  }

/* Moving between two similar registers is just one instruction.  */
else if (reg_classes_intersect_p (to, from))
  return 2;

/* Everything else has to go through GENERAL_REGS.  */
else
  return rs6000_register_move_cost (GENERAL_REGS, to) 
          + rs6000_register_move_cost (from, GENERAL_REGS);

}

That deals with all the individual Altivec registers which go through
GPRs, with XER, handles the CR_REGS vs. CR0_REGS preference, and
describes the additional cost of 64-bit or 128-bit moves using shorter GPRs.

-- 
- Geoffrey Keating <geoffk@geoffk.org>


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]